Wrong LVDS clock Apalis IMX6

Hello,

I try to set up a display using LVDS.
Therefore, I changed the device tree to adapt the timing and to disable the other framebuffers, so that only LVDS should be used. I have cleared the vidargs variable to use the device tree settings.
“fbset” displays the correct frequency of 33.3 MHZ, as set in the device tree.
If I measure the LVDS clock, it is only 25.1 MHZ and the output of “cat /sys/kernel/debug/clk/clk_summary” shows that the ldb clock is set to 25.1 MHZ as measured with an oscilloscope.
Do you have any idea why the ldb clock is not set to 33.3 MHZ or do I miss something?
You can find the device tree file in the attachment.

Thanks in advance

link text

fbset:

mode "800x480-58"
        # D: 33.300 MHz, H: 30.948 kHz, V: 57.847 Hz
        geometry 800 480 800 480 32
        timings 30030 46 210 23 22 20 10
        accel false
        rgba 8/16,8/8,8/0,8/24
endmode

cat /sys/kernel/debug/clk/clk_summary:

   clock                         enable_cnt  prepare_cnt        rate   accuracy   phase
----------------------------------------------------------------------------------------
 ds3231_clk_32khz                         0            0       32768          0 0  
 ds3231_clk_sqw                           0            0        8192          0 0  
 anaclk2                                  0            0           0          0 0  
    lvds2_in                              0            0           0          0 0  
 anaclk1                                  0            0           0          0 0  
    lvds1_in                              0            0           0          0 0  
 dummy                                    3            4           0          0 0  
    lvds2_sel                             0            0           0          0 0  
       lvds2_gate                         0            0           0          0 0  
    lvds1_sel                             0            0           0          0 0  
       lvds1_gate                         0            0           0          0 0  
    usbphy2_gate                          1            1           0          0 0  
    usbphy1_gate                          1            1           0          0 0  
 osc                                      6            6    24000000          0 0  
    cko2_sel                              1            1    24000000          0 0  
       cko2_podf                          1            1    24000000          0 0  
          cko2                            1            1    24000000          0 0  
             cko                          1            1    24000000          0 0  
    periph_clk2_sel                       0            0    24000000          0 0  
       periph_clk2                        0            0    24000000          0 0  
    gpt_3m                                1            1     3000000          0 0  
    pll7                                  1            1   480000000          0 0  
       pll7_bypass                        1            1   480000000          0 0  
          pll7_usb_host                   1            1   480000000          0 0  
             usbphy2                      1            1   480000000          0 0  
    pll6                                  1            1   500000000          0 0  
       pll6_bypass                        1            1   500000000          0 0  
          pll6_enet                       1            1   500000000          0 0  
             enet_ref                     1            1   125000000          0 0  
             pcie_ref                     0            0   125000000          0 0  
                pcie_ref_125m             0            0   125000000          0 0  
             sata_ref                     0            0   100000000          0 0  
                sata_ref_100m             0            0   100000000          0 0  
    pll5                                  0            0   296600000          0 0  
       pll5_bypass                        0            0   296600000          0 0  
          pll5_video                      0            0   296600000          0 0  
             pll5_post_div                0            0    74150000          0 0  
                pll5_video_div            0            0    74150000          0 0  
                   ipu2_di1_pre_sel           0            0    74150000          0 0  
                      ipu2_di1_pre           0            0    24716667          0 0  
                         ipu2_di1_sel           0            0    24716667          0 0  
                            ipu2_di1           0            0    24716667          0 0  
                   ipu2_di0_pre_sel           0            0    74150000          0 0  
                      ipu2_di0_pre           0            0    24716667          0 0  
                         ipu2_di0_sel           0            0    24716667          0 0  
                            ipu2_di0           0            0    24716667          0 0  
                   ipu1_di1_pre_sel           0            0    74150000          0 0  
                      ipu1_di1_pre           0            0    24716667          0 0  
                         ipu1_di1_sel           0            0    24716667          0 0  
                            ipu1_di1           0            0    24716667          0 0  
                   ipu1_di0_pre_sel           0            0    74150000          0 0  
                      ipu1_di0_pre           0            0    24716667          0 0  
    pll4                                  0            0   147456000          0 0  
       pll4_bypass                        0            0   147456000          0 0  
          pll4_audio                      0            0   147456000          0 0  
             pll4_post_div                0            0    36864000          0 0  
                pll4_audio_div            0            0    36864000          0 0  
    pll3                                  1            1   480000000          0 0  
       pll3_bypass                        1            1   480000000          0 0  
          pll3_usb_otg                    2            2   480000000          0 0  
             gpu2d_core_sel               0            0   480000000          0 0  
                gpu2d_core_podf           0            0   480000000          0 0  
                   gpu2d_core             0            0   480000000          0 0  
             asrc_sel                     0            0   480000000          0 0  
                asrc_pred                 0            0   240000000          0 0  
                   asrc_podf              0            0    30000000          0 0  
                      asrc                0            0    30000000          0 0  
             esai_sel                     0            0   480000000          0 0  
                esai_pred                 0            0   240000000          0 0  
                   esai_podf              0            0    30000000          0 0  
                      esai_extal           0            0    30000000          0 0  
             periph2_clk2_sel             0            0   480000000          0 0  
                periph2_clk2              0            0   480000000          0 0  
             pll3_60m                     0            0    60000000          0 0  
                can_root                  0            0    30000000          0 0  
                   can2_serial            0            0    30000000          0 0  
                   can1_serial            0            0    30000000          0 0  
                ecspi_root                0            0    60000000          0 0  
                   ecspi5                 0            0    60000000          0 0  
                   ecspi4                 0            0    60000000          0 0  
                   ecspi3                 0            0    60000000          0 0  
                   ecspi2                 0            0    60000000          0 0  
                   ecspi1                 0            0    60000000          0 0  
             pll3_80m                     1            1    80000000          0 0  
                uart_serial_podf           1            1    80000000          0 0  
                   uart_serial            1            2    80000000          0 0  
             pll3_120m                    0            0   120000000          0 0  
             pll3_pfd3_454m               0            0   454736842          0 0  
                spdif_sel                 0            0   454736842          0 0  
                   spdif_pred             0            0   227368421          0 0  
                      spdif_podf           0            0    28421053          0 0  
                         spdif            0            0    28421053          0 0  
             pll3_pfd2_508m               0            0   508235294          0 0  
                ssi3_sel                  0            0   508235294          0 0  
                   ssi3_pred              0            0   127058824          0 0  
                      ssi3_podf           0            0    63529412          0 0  
                         ssi3             0            0    63529412          0 0  
                ssi2_sel                  0            0   508235294          0 0  
                   ssi2_pred              0            0   127058824          0 0  
                      ssi2_podf           0            0    63529412          0 0  
                         ssi2             0            0    63529412          0 0  
                ssi1_sel                  0            0   508235294          0 0  
                   ssi1_pred              0            0   127058824          0 0  
                      ssi1_podf           0            0    63529412          0 0  
                         ssi1             0            0    63529412          0 0  
             pll3_pfd1_540m               0            0   540000000          0 0  
                video_27m                 0            0    27000000          0 0  
                   mipi_core_cfg           0            0    27000000          0 0  
                      hdmi_isfr           0            0    27000000          0 0  
             pll3_pfd0_720m               0            0   720000000          0 0  
             usbphy1                      0            0   480000000          0 0  
    pll2                                  1            1   528000000          0 0  
       pll2_bypass                        1            1   528000000          0 0  
          pll2_bus                        3            3   528000000          0 0  
             periph2_pre                  1            1   528000000          0 0  
                periph2                   1            1   528000000          0 0  
                   mmdc_ch1_axi_podf           1            1   176000000          0 0  
                      mmdc_ch1_axi           1            1   176000000          0 0  
                         ldb_di0_sel           1            1   176000000          0 0  
                            ldb_di0_div_7           0            0    25142857          0 0  
                               ldb_di0_div_sel           0            0    25142857          0 0  
                            ldb_di0_div_3_5           1            1    50285714          0 0  
                               ldb_di0_podf           1            1    25142857          0 0  
                                  ldb_di0           1            1    25142857          0 0  
                                     ipu1_di0_sel           1            1    25142857          0 0  
                                        ipu1_di0            1            1    25142857          0 0  
                                           ipu1_pclk0_sel           1            1    25142857          0 0  
                                              ipu1_pclk0_div            1            1    25142857          0 0  
                                                 ipu1_pclk0                   1            1    25142857          0 0  
                         ldb_di1_sel           0            0   176000000          0 0  
                            ldb_di1_div_7           0            0    25142857          0 0  
                               ldb_di1_div_sel           0            0    25142857          0 0  
                            ldb_di1_div_3_5           0            0    50285714          0 0  
                               ldb_di1_podf           0            0    25142857          0 0  
                                  ldb_di1           0            0    25142857          0 0  
             periph_pre                   1            1   528000000          0 0  
                periph                    3            3   528000000          0 0  
                   ahb                    6            6   132000000          0 0  
                      sdma                4            2   132000000          0 0  
                      sata                0            0   132000000          0 0  
                      rom                 1            1   132000000          0 0  
                      ocram               2            2   132000000          0 0  
                      hdmi_iahb           0            0   132000000          0 0  
                      esai_mem            0            0   132000000          0 0  
                      esai_ipg            0            0   132000000          0 0  
                      caam_aclk           1            1   132000000          0 0  
                      caam_mem            1            1   132000000          0 0  
                      asrc_mem            0            0   132000000          0 0  
                      asrc_ipg            0            0   132000000          0 0  
                      cko1_sel            0            0   132000000          0 0  
                         cko1_podf           0            0    16500000          0 0  
                            cko1           0            0    16500000          0 0  
                      ipg                 6            7    66000000          0 0  
                         usboh3           1            1    66000000          0 0  
                         uart_ipg           1            2    66000000          0 0  
                         ssi3_ipg           0            0    66000000          0 0  
                         ssi2_ipg           0            0    66000000          0 0  
                         ssi1_ipg           0            1    66000000          0 0  
                         spdif_gclk           0            0    66000000          0 0  
                         spba             0            0    66000000          0 0  
                         mipi_ipg           0            0    66000000          0 0  
                         iim              0            0    66000000          0 0  
                         gpt_ipg           1            1    66000000          0 0  
                         enet             2            2    66000000          0 0  
                         can2_ipg           0            0    66000000          0 0  
                         can1_ipg           0            0    66000000          0 0  
                         caam_ipg           1            1    66000000          0 0  
                         ipg_per           1            1    66000000          0 0  
                            pwm4           1            1    66000000          0 0  
                            pwm3           0            0    66000000          0 0  
                            pwm2           0            0    66000000          0 0  
                            pwm1           0            0    66000000          0 0  
                            i2c3           0            0    66000000          0 0  
                            i2c2           0            0    66000000          0 0  
                            i2c1           0            0    66000000          0 0  
                            gpt_ipg_per           0            0    66000000          0 0  
                   mmdc_ch0_axi_podf           1            1   528000000          0 0  
                      mmdc_ch0_axi           2            3   528000000          0 0  
                         gpu3d_core_sel           0            0   528000000          0 0  
                            gpu3d_core_podf           0            0   528000000          0 0  
                               gpu3d_core           0            0   528000000          0 0  
                         ipu1_sel           1            1   528000000          0 0  
                            ipu1_podf           1            1   264000000          0 0  
                               ipu1           1            1   264000000          0 0  
                                  ipu1_pclk1_sel           0            0   264000000          0 0  
                                     ipu1_pclk1_div           0            0           0          0 0  
                                        ipu1_pclk1           0            0           0          0 0  
                               dcic1           0            0   264000000          0 0  
                         ipu2_sel           0            1   528000000          0 0  
                            ipu2_podf           0            1   264000000          0 0  
                               ipu2           0            1   264000000          0 0  
                                  ipu2_pclk1_sel           0            0   264000000          0 0  
                                     ipu2_pclk1_div           0            0           0          0 0  
                                        ipu2_pclk1           0            0           0          0 0  
                                  ipu2_pclk0_sel           0            0   264000000          0 0  
                                     ipu2_pclk0_div           0            0           0          0 0  
                                        ipu2_pclk0           0            0           0          0 0  
                               dcic2           0            0   264000000          0 0  
                   axi_sel                1            1   528000000          0 0  
                      axi                 2            2   264000000          0 0  
                         openvg_axi           0            0   264000000          0 0  
                         mlb              0            0   264000000          0 0  
                         gpu2d_axi           0            0   264000000          0 0  
                         gpu3d_axi           0            0   264000000          0 0  
                         pcie_axi_sel           0            0   264000000          0 0  
                            pcie_axi           0            0   264000000          0 0  
                         eim_slow_sel           1            1   264000000          0 0  
                            eim_slow_podf           1            1   132000000          0 0  
                               eim_slow           1            1   132000000          0 0  
                         vdo_axi_sel           0            0   264000000          0 0  
                            vdo_axi           0            0   264000000          0 0  
                               vdoa           0            0   264000000          0 0  
                         vpu_axi_sel           0            0   264000000          0 0  
                            vpu_axi_podf           0            0   264000000          0 0  
                               vpu_axi           0            0   264000000          0 0  
             pll2_pfd2_396m               1            1   396000000          0 0  
                enfc_sel                  0            0   396000000          0 0  
                   enfc_pred              0            0    79200000          0 0  
                      enfc_podf           0            0    19800000          0 0  
                         enfc             0            0    19800000          0 0  
                            gpmi_io           0            0    19800000          0 0  
                eim_sel                   0            0   396000000          0 0  
                   eim_podf               0            0   198000000          0 0  
                usdhc4_sel                0            0   396000000          0 0  
                   usdhc4_podf            0            0   198000000          0 0  
                      usdhc4              0            0   198000000          0 0  
                         gpmi_bch           0            0   198000000          0 0  
                usdhc3_sel                0            0   396000000          0 0  
                   usdhc3_podf            0            0   198000000          0 0  
                      usdhc3              0            0   198000000          0 0  
                         apbh_dma           0            0   198000000          0 0  
                         per1_bch           0            0   198000000          0 0  
                         gpmi_bch_apb           0            0   198000000          0 0  
                         gpmi_apb           0            0   198000000          0 0  
                usdhc2_sel                0            0   396000000          0 0  
                   usdhc2_podf            0            0   198000000          0 0  
                      usdhc2              0            0   198000000          0 0  
                usdhc1_sel                0            0   396000000          0 0  
                   usdhc1_podf            0            0   198000000          0 0  
                      usdhc1              0            0   198000000          0 0  
                hsi_tx_sel                0            0   396000000          0 0  
                   hsi_tx_podf            0            0   198000000          0 0  
                      hsi_tx              0            0   198000000          0 0  
                axi_alt_sel               0            0   396000000          0 0  
                step                      1            1   396000000          0 0  
                   pll1_sw                1            1   396000000          0 0  
                      arm                 2            2   396000000          0 0  
                         twd              1            1   198000000          0 0  
                pll2_198m                 0            0   198000000          0 0  
             pll2_pfd1_594m               0            0   594000000          0 0  
                gpu3d_shader_sel           0            0   594000000          0 0  
                   gpu3d_shader           0            0   594000000          0 0  
             pll2_pfd0_352m               0            0   352000000          0 0  
    pll1                                  0            0   996000000          0 0  
    pll7_bypass_src                       0            0    24000000          0 0  
    pll6_bypass_src                       0            0    24000000          0 0  
    pll5_bypass_src                       0            0    24000000          0 0  
    pll4_bypass_src                       0            0    24000000          0 0  
    pll3_bypass_src                       0            0    24000000          0 0  
    pll2_bypass_src                       0            0    24000000          0 0  
    pll1_bypass_src                       0            0    24000000          0 0  
       pll1_bypass                        0            0    24000000          0 0  
          pll1_sys                        0            0    24000000          0 0  
 ckih1                                    0            0           0          0 0  
 ckil                                     0            0       32768          0 0  

Hi

The ldb clock by default is derived from PLL2 which is at the fixed frequency of 528MHz. Additionally ldb needs a clock which is seven times the pixelclock which limits how close the resulting pixelclock is to the requested one.

You could use a different parent clock which allows to get a closer pixelclock. Assuming you do not use another display output then PLL5 would be a good candidate as with PLL5 the PLL frequency will be set to what you need exactly. To override the parent clock to PLL5 add the following to the &clks device tree node:

+&clks {
+        assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+                          <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+        assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
+                                 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
+};
+

Max

P.S. Your question is related to the kernel, so specifying what exact kernel version you use might help.

Hi Max,

Thanks for your help.
With your adaption, the ldb clock works now with 33.3 MHz.
Unfortunately, my display is still not working. Just a totally scrambled output.
Do I need to do something else then defining the display timing in the device tree?
The display uses RGB signals but has an adapter print with a LVDS deserializer. You can find the datasheet of the adapter print and display in the attachment.
According to me, the timing defined in the device tree should work

By the way, the kernel version with “uname -r”: 4.9.87-2.8.3+g07d40f6ffcbb

Best regards,
Fabian

link text

Hi @fabian

Could you share a picture of your display output?

You could try to switch the polarity of the pixel-clock by setting pixelclk-active to 1.

Best regards,
Jaski

Hi Jaski,

You can find attached a picture of the display output.
I have already tried to set pixelclk-active to 1 but that does not change anything.
I also tried different settings for hsync-active and vsync-active without success.

alt text

Best regrads,
Fabian

By the way, I added fb-test to the image. The output is after the command fb-test, which should display a test image

HI @fabian

Thanks for the picture of the screen.
Did you set-up also the vidargs as described here?

Additionally can you share your connection diagram between the module and LCD display.

You can post a comment, change the visibility to “Viewable by moderators and the original poster”.

Best regards,
Jaski

Please note that BSP 2.8b3 is long since deprecated as it got superseded by stable BSP 2.8b6.

Hi,

Just for your information.
It turned out that the datasheet of the LVDS board had a wrong pinout.
Channel D and RCLK are swapped.
So, everything is working as expected now.

I marked Max’s answer as the correct one, since it is the answer to my initial question.
Thanks all for your help

Best regards,
Fabian

Perfect that it works. Thanks for the feedback.