Verdin iMX8M Plus: MCLK Not Generated on MIPI-CSI Interface

Hi Toradex Team,

I am trying to connect a camera to the MIPI-CSI interface on the Verdin iMX8M Plus Development Board. The camera node has been added to the mainline DTS file, as shown in the attached file 1.

[1]:
0001-Add-os08a10-Camera-node.patch (3.2 KB

However, I am not seeing the expected MCLK signal on the MIPI-CSI interface. It seems the clock is not being generated as intended. Could you please help me verify if I have missed anything in the device tree configuration or if there are additional steps required to enable the MCLK signal?

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Hello,

Thank you for reaching out with your question about the MCLK signal on the MIPI-CSI interface of the Verdin iMX8M Plus. Let’s go through some steps to help you troubleshoot and resolve this issue:

  1. Device Tree Configuration: Double-check that the camera node in your device tree is correctly configured. The MCLK (Master Clock) signal is typically controlled by a specific clock node. Ensure that the clock source for the MIPI-CSI interface is properly defined and enabled in your DTS file.

  2. Clock Source: Verify that the clock source for the MCLK is set up correctly. This may involve specifying the correct clock parent and frequency in the device tree. Look for entries related to clocks, clock-names, and assigned-clocks in your camera node or related nodes.

  3. Kernel Configuration: Make sure your kernel configuration supports the MIPI-CSI interface and the specific camera you are using. This might require enabling certain drivers or modules in the kernel configuration.

  4. Check for Errors: Use the dmesg command to look for any error messages related to the MIPI-CSI interface or the camera. This can provide clues if there are issues with the clock or other related components.

  5. Documentation and Examples: Review any available documentation or example configurations for the Verdin iMX8M Plus. These resources can offer insights into the correct setup and configuration for the MIPI-CSI interface.

I hope these steps help you resolve the issue. If you have any further questions, feel free to ask.

Best regards,
Toradex AI Assistant

Please, also check if these links can help you solve your problem:

Why is USB_2_OC# a GPIO on Verdin IMX8MP.

I fiddled around with this last year as well. I think this is what I needed to make it work:

// Setup pin mux for CLKO2 (xclk above).
// TODO: Should this be here? Or in the cam_node somewhere?

#define MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2 0x050 0x2B0 0x000 0x6 0x0
&pinctrl_gpio_hog3 {
  fsl,pins =
   // CSI_1_MCLK
   <MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2 0x4>; // SODIMM 91
};

What this does is set up the pin muxing to actually bring out the CCM_CLKO2 on the GPIO1_IO15 pin, instead of the muxing it to the GPIO controller (which is what the pinctrl_gpio_hog3 dt node normally does).

This might not be the best place to do this (since now the pinctrl is not connected to the camera at all, instead placed in a hog node that is just enabled by the pin mux or gpio controller or something directly at startup), but I think it works.

I’m not completely sure it works, since the camera we are using turned out to not require MCLK at all, so we’re not currently using this snippet (but I think I tested it to work before I discovered this).

Just in case it is useful, here’s the full DT overlay we are using currently. It is for a different camera, but the CSI-parts are still relevant:

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright 2020-2021 e-consystems
 * Copyright 2024 3devo.com
 */

// CSI Camera imx708. Based on overlay for e-con AR0521.

/dts-v1/;
/plugin/;

#include <dt-bindings/clock/imx8mp-clock.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	compatible = "toradex,verdin-imx8mp";
};

&cameradev {
	status = "okay";
};

&reg_imx708 {
	status = "okay";
};

/* Verdin I2C_4_CSI */
&i2c3 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	cam_node: imx708@1a {
		compatible = "sony,imx708";
		reg = <0x1a>;
		status = "okay";

		/*
		Sensor board has its own crystal (and
		toradex-to-rpi-adapter-board does not have have the clock
		pin forwarded in any case), but the driver insists to
		have an xclk. This should probably refer to a dummy
		clock then, but this just sets up an actual clock.
		*/
		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>;
		clock-names = "xclk";

		/* All supplies are derived from the 3.3V to the camera
		 * PCB. For simplicity, these regulators are not
		 * individually modeled. */
		VANA1-supply = <&reg_imx708>;     /* 2.8v */
		VANA2-supply = <&reg_imx708>;     /* 1.8v */
		VDIG-supply = <&reg_imx708>;      /* 1.1v */
		VDDL-supply = <&reg_imx708>;      /* 1.8v */

		/*
		rotation = <180>;
		orientation = <2>;
		*/

		port {
			imx708_mipi_0_ep: endpoint {
				clock-lanes = <0>;
				data-lanes = <1 2>;
				clock-noncontinuous;
				link-frequencies =
					/bits/ 64 <450000000>;
			};
		};
	};
};

/*
Setup pin mux for CLKO2 (xclk above).
TODO: Should this be here? Or in the cam_node somewhere?
Disabled, IMX708 module has its own clock

#define MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2 0x050 0x2B0 0x000 0x6 0x0
&pinctrl_gpio_hog3 {
  fsl,pins =
   // CSI_1_MCLK
   <MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2 0x4>; // SODIMM 91
};
*/

&isi_0 {
	status = "okay";

	cap_device {
		status = "okay";
	};

};

&mipi_csi_0 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	csi = <0>;

	port@0 {
		reg = <0>;

		mipi_csi0_ep: endpoint {
			/* NOTE: This is parsed by imx8-mipi-csi2-sam.c
			 * and uses different properties than the sensor
			 * endpoint...*/
			csis-hs-settle = <13>;
			csis-clk-settle = <2>;
			csis-wclk;
			data-lanes = <2>;
			clock-noncontinuous;
			remote-endpoint = <&imx708_mipi_0_ep>;
		};
	};
};

Hi @matthijs

Thank you for your response.

Unfortunately, it’s not working for me.

I also tested the OV5640 camera using the default Yocto image and overlay provided in the Toradex Yocto source, but even in that case, I am not receiving the clock signal.

I referred to this document: CSI Camera Module 5MP OV5640 ArduCam.

Please find the logs below for your reference:

root@verdin-imx8mp-15445880:~# dmesg | grep ov5640

[    0.063529] platform 32e40000.csi: Fixed dependency cycle(s) with /soc@0/bus@30800000/i2c@30a40000/ov5640_mipi@3c
[    1.668017] platform 32e40000.csi: Fixed dependency cycle(s) with /soc@0/bus@30800000/i2c@30a40000/ov5640_mipi@3c
[    6.316808] ov5640 2-003c: ov5640_read_reg: error: reg=300a
[    6.329862] ov5640 2-003c: ov5640_check_chip_id: failed to read chip identifier

root@verdin-imx8mp-15445880:~# dmesg | grep camera

[    1.678444] i2c 2-003c: Fixed dependency cycle(s) with /soc@0/bus@32c00000/camera/csi@32e40000
[    6.248202] mxc-md 32c00000.bus:camera: deferring cap_device registration
[    7.381848] mxc-md 32c00000.bus:camera: deferring cap_device registration

root@verdin-imx8mp-15445880:~# dmesg | grep csi

[    0.063529] platform 32e40000.csi: Fixed dependency cycle(s) with /soc@0/bus@30800000/i2c@30a40000/ov5640_mipi@3c
[    1.668017] platform 32e40000.csi: Fixed dependency cycle(s) with /soc@0/bus@30800000/i2c@30a40000/ov5640_mipi@3c
[    1.678444] i2c 2-003c: Fixed dependency cycle(s) with /soc@0/bus@32c00000/camera/csi@32e40000
[    6.341905] imx8_mipi_csi2_sam: module is from the staging directory, the quality is unknown, you have been warned.
[    6.414766] mxc-mipi-csi2-sam 32e40000.csi: supply mipi-phy not found, using dummy regulator
[    6.462799] : mipi_csis_imx8mp_phy_reset, No remote pad found!
[    6.469074] mxc-mipi-csi2-sam 32e40000.csi: lanes: 2, hs_settle: 13, clk_settle: 2, wclk: 1, freq: 500000000