Pin Multiplexing - Change pin functionality

Hi,

I have imx8mp Verdin system and need to change SODIMM 64 functionality to GPIO:

  1. To disable this pin:
	pinctrl_flexspi0: flexspi0grp {
		fsl,pins =
			<MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16		0x82>;	/* SODIMM 64 */

I did it directly in imx8mp-verdin.dtsi file and replaced default with disabled:

&flexspi {
pinctrl-names = “disabled”;
pinctrl-0 = <&pinctrl_flexspi0>;
};

  1. Then I have created a new flexspi-to-gpio.dts file below and created a new group with a new function:

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>

// A) Header file with pin definitions
#include <imx8mp-pinfunc.h>

/ {
compatible = “toradex,verdin-imx8mp”;
};

&iomuxc {
pinctrl-names = “default”;

// Append your custom pin group to the iomuxc defaults
pinctrl-0 = <&pinctrl_output_pins>; 

// Define your pin mapping group
// Added for  gpio-80  (SODIMM_64)
pinctrl_output_pins: gpiosodimm64grp {
	fsl,pins = <
		MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x184
	>;
};	

};

  1. I added flexspi-to-gpio.dts to tcbuild.yaml file:

    overlays:
    add:

    • device-trees/overlays/flexspi-to-gpio.dts
  2. run and deployed the nee OS image but the new function is not working when tried to open it programmatically , the C++ function call below fails for this pin

  3. line = gpiod_chip_get_line(currentGpioChip, currentGpioLine);

Hi, I’m the Toradex AI Assistant.

I might make mistakes or occasionally get you wrong. Our support team will step in if needed.


I can guide you on pin multiplexing for SODIMM 64 on the Verdin iMX8M Plus. However, to provide the most accurate instructions, could you let me know which version of Torizon OS or BSP you are running? You can find this by running tdx-info on your device.(1)(2)

That said, here’s the general approach based on the documentation:

Issues with Your Current Approach

  1. Modifying base device tree files directly (imx8mp-verdin.dtsi) is not recommended for production. Device tree overlays are the proper method.(1)(2)

  2. Disabling FlexSPI: Setting pinctrl-names = "disabled" doesn’t actually disable the peripheral. You need to set status = "disabled" on the &flexspi node.(3)

  3. Overlay structure: Your overlay should disable the FlexSPI peripheral and configure the pin as GPIO.(1)

Recommended Overlay Structure

Your flexspi-to-gpio.dts overlay should look like this:

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include "imx8mp-pinfunc.h"

/ {
    compatible = "toradex,verdin-imx8mp";
};

&flexspi {
    status = "disabled";
};

&iomuxc {
    pinctrl_sodimm_64_gpio: sodimm64gpiogrp {
        fsl,pins = <
            MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x184
        >;
    };
};

&gpio3 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_sodimm_64_gpio>;
};

(1)(3)

Key Points

  • Disable FlexSPI: The &flexspi { status = "disabled"; } section releases SODIMM 64 from FlexSPI control.(3)
  • Pin configuration: 0x184 configures the pin with weak pull-down.(1)
  • GPIO controller: The pin is assigned to &gpio3 since it’s GPIO3_IO16.(1)(3)

Setting Pin Direction

After applying the overlay, you can control the GPIO direction from Linux using tools like gpioset.(1)(3)

For more details on writing device tree overlays, see the comprehensive guide.(1)

Best regards,
Toradex AI Assistant


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I tried exactly AI example and still the same error.

flexspi-to-gpio.dts (440 Bytes)

Hers is what I have for the command below and I do not see any GPIO3_IO16 :

cat /sys/kernel/debug/pinctrl/pinctrl-handles

Requested pin control handlers their pinmux maps:
device: 30330000.pinctrl current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: gpio1grp (11) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO00 (5)config 00000184
type: MUX_GROUP controller 30330000.pinctrl group: gpio2grp (12) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO01 (6)config 000001c4
type: MUX_GROUP controller 30330000.pinctrl group: gpio3grp (13) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO05 (10)config 00000184
type: MUX_GROUP controller 30330000.pinctrl group: gpio4grp (14) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO06 (11)config 00000184
type: MUX_GROUP controller 30330000.pinctrl group: gpio7grp (16) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI1_RXD1 (85)config 00000184
type: MUX_GROUP controller 30330000.pinctrl group: gpio8grp (17) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI1_RXC (83)config 00000184
type: MUX_GROUP controller 30330000.pinctrl group: gpiohog1grp (20) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI2_MISO (126)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI2_MOSI (125)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI2_SCLK (124)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI2_SS0 (127)config 000001c4
type: MUX_GROUP controller 30330000.pinctrl group: gpiohog2grp (21) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI3_MCLK (116)config 000001c4
type: MUX_GROUP controller 30330000.pinctrl group: gpiohog3grp (22) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO15 (20)config 000001c4
type: MUX_GROUP controller 30330000.pinctrl group: hdmihoggrp (25) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_HDMI_CEC (146)config 00000019
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_HDMI_DDC_SCL (144)config 000001c3
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_HDMI_DDC_SDA (145)config 000001c3
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_HDMI_HPD (147)config 00000019
device: 30860000.serial current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: uart1grp (45) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI2_RXD0 (105)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI2_TXFS (106)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_UART1_RXD (136)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_UART1_TXD (137)config 000001c4
device: 30880000.serial current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: uart3grp (49) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_UART3_RXD (140)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_UART3_TXD (141)config 000001c4
device: 30890000.serial current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: uart2grp (48) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_UART2_RXD (138)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_UART2_TXD (139)config 000001c4
type: MUX_GROUP controller 30330000.pinctrl group: uart2ctsgrp (46) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD1_DATA4 (41)config 000001c4
type: MUX_GROUP controller 30330000.pinctrl group: uart2rtsgrp (47) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD1_DATA5 (42)config 000001c4
device: 30280000.watchdog current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: wdoggrp (68) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO02 (7)config 000000c6
device: 30b60000.mmc current state: state_200mhz
state: default
type: MUX_GROUP controller 30330000.pinctrl group: usdhc3grp (65) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO09 (14)config 000001d1
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE1_B (58)config 00000190
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE2_B (59)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE3_B (60)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CLE (61)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA04 (66)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA05 (67)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA06 (68)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA07 (69)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_RE_B (71)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_WE_B (73)config 00000190
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_WP_B (74)config 000001d0
state: state_100mhz
type: MUX_GROUP controller 30330000.pinctrl group: usdhc3-100mhzgrp (66) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO09 (14)config 000001d1
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE1_B (58)config 00000194
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE2_B (59)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE3_B (60)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CLE (61)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA04 (66)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA05 (67)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA06 (68)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA07 (69)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_RE_B (71)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_WE_B (73)config 00000194
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_WP_B (74)config 000001d4
state: state_200mhz
type: MUX_GROUP controller 30330000.pinctrl group: usdhc3-200mhzgrp (67) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO09 (14)config 000001d1
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE1_B (58)config 00000196
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE2_B (59)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CE3_B (60)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_CLE (61)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA04 (66)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA05 (67)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA06 (68)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_DATA07 (69)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_RE_B (71)config 000001d2
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_WE_B (73)config 00000196
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_WP_B (74)config 000001d6
device: 30220000.gpio current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: sodimm64gpiogrp (0) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_READY_B (72)config 00000184
device: 30230000.gpio current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: ctrlsleepmocigrp (2) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI3_RXC (111)config 000001c4
device: regulator-usb1-vbus current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: usb1vbusgrp (51) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO12 (17)config 00000106
device: regulator-usb2-vbus current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: usb2vbusgrp (54) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO14 (19)config 00000106
device: regulator-usdhc2 current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2pwrengrp (60) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI2_RXC (104)config 00000004
device: 30a20000.i2c current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: i2c1grp (26) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C1_SCL (128)config 000001c6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C1_SDA (129)config 000001c6
state: gpio
type: MUX_GROUP controller 30330000.pinctrl group: i2c1gpiogrp (27) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C1_SCL (128)config 000001c6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C1_SDA (129)config 000001c6
device: 0-0025 current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: pmicirqgrp (37) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO03 (8)config 000001c4
device: 30a30000.i2c current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: i2c2grp (28) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C2_SCL (130)config 000001c6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C2_SDA (131)config 000001c6
state: gpio
type: MUX_GROUP controller 30330000.pinctrl group: i2c2gpiogrp (29) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C2_SCL (130)config 000001c6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C2_SDA (131)config 000001c6
device: 30a50000.i2c current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: i2c4grp (32) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C4_SCL (134)config 000001c6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C4_SDA (135)config 000001c6
state: gpio
type: MUX_GROUP controller 30330000.pinctrl group: i2c4gpiogrp (33) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C4_SCL (134)config 000001c6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_I2C4_SDA (135)config 000001c6
device: 30b50000.mmc current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2grp (61) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO04 (9)config 00000004
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CLK (48)config 00000190
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CMD (49)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA0 (50)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA1 (51)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA2 (52)config 000001d0
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA3 (53)config 000001d0
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2cdgrp (58) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CD_B (47)config 000001c4
state: state_100mhz
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2-100mhzgrp (62) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO04 (9)config 00000004
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CLK (48)config 00000194
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CMD (49)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA0 (50)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA1 (51)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA2 (52)config 000001d4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA3 (53)config 000001d4
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2cdgrp (58) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CD_B (47)config 000001c4
state: state_200mhz
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2-200mhzgrp (63) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO04 (9)config 00000004
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CLK (48)config 00000196
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CMD (49)config 000001d6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA0 (50)config 000001d6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA1 (51)config 000001d6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA2 (52)config 000001d6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA3 (53)config 000001d6
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2cdgrp (58) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CD_B (47)config 000001c4
state: sleep
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2slpgrp (64) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO04 (9)config 00000000
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CLK (48)config 00000100
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CMD (49)config 00000100
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA0 (50)config 00000100
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA1 (51)config 00000100
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA2 (52)config 00000100
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_DATA3 (53)config 00000100
type: MUX_GROUP controller 30330000.pinctrl group: usdhc2cdslpgrp (59) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_CD_B (47)config 00000000
device: regulator-module-eth1phy current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: regethgrp (42) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_WP (55)config 00000184
device: gpio-keys current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: gpiokeysgrp (24) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI1_RXFS (82)config 000001c4
device: 30bf0000.ethernet current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: eqosgrp (4) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_MDC (21)config 00000003
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_MDIO (22)config 00000003
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_RD0 (31)config 00000091
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_RD1 (32)config 00000091
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_RD2 (33)config 00000091
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_RD3 (34)config 00000091
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_RXC (30)config 00000091
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_RX_CTL (29)config 00000091
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_TD0 (26)config 0000001f
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_TD1 (25)config 0000001f
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_TD2 (24)config 0000001f
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_TD3 (23)config 0000001f
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_TX_CTL (27)config 0000001f
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ENET_TXC (28)config 0000001f
device: 30660000.pwm current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: pwm1grp (38) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SPDIF_EXT_CLK (119)config 00000006
device: 30670000.pwm current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: pwm2grp (39) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO11 (16)config 00000006
device: 30680000.pwm current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: pwm3grp (40) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI5_RXC (76)config 00000006
device: 30820000.spi current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: ecspi1grp (3) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI1_MISO (122)config 000001c4
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI1_MOSI (121)config 00000004
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI1_SCLK (120)config 00000004
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_ECSPI1_SS0 (123)config 000001c4
device: 32f10100.usb current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: usb1ocngrp (53) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_GPIO1_IO13 (18)config 000001c4
device: 308c0000.can current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: flexcan1grp (8) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SPDIF_RX (118)config 00000154
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SPDIF_TX (117)config 00000154
device: 308d0000.can current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: flexcan2grp (9) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI2_MCLK (109)config 00000154
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI2_TXD0 (108)config 00000154
device: 3-001a current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: sai1grp (43) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI1_MCLK (102)config 00000096
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI1_RXD0 (84)config 000001d6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI5_MCLK (81)config 000001d6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI5_RXD1 (78)config 000001d6
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI5_RXFS (75)config 00000096
device: 33800000.pcie current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: pciegrp (36) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SAI1_TXD7 (101)config 00000004
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD2_RESET_B (54)config 000001c4
device: 38100000.usb:connector current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: usb1idgrp (52) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_SD1_RESET_B (45)config 000001c4

I can see your overlay is being applied (the sodimm64gpiogrp group appears in the pinctrl output), but there’s a critical issue: you’re assigning the pin to the wrong GPIO controller.(1)(2)

The Problem

SODIMM 64 (GPIO3_IO16) belongs to GPIO controller 3 (gpio3), but your overlay assigns it to gpio1 (device 30220000.gpio). This is why you see:

device: 30220000.gpio current state: default
state: default
type: MUX_GROUP controller 30330000.pinctrl group: sodimm64gpiogrp (0) function: pinctrl (0)
type: CONFIGS_PIN controller 30330000.pinctrl pin MX8MP_IOMUXC_NAND_READY_B (72)config 00000184

The pin is configured, but it’s not accessible through the correct GPIO controller.(1)(2)

Corrected Overlay

Your flexspi-to-gpio.dts should assign the pin to &gpio3, not &gpio1:

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include "imx8mp-pinfunc.h"

/ {
    compatible = "toradex,verdin-imx8mp";
};

&flexspi {
    status = "disabled";
};

&iomuxc {
    pinctrl_sodimm_64_gpio: sodimm64gpiogrp {
        fsl,pins = <
            MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x184
        >;
    };
};

&gpio3 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_sodimm_64_gpio>;
};

(1)(2)

Verification Steps

After rebuilding and deploying the overlay:

  1. Check the pin assignment:

    cat /sys/kernel/debug/pinctrl/pinctrl-handles | grep -A2 "30240000.gpio"
    

    You should now see the pin assigned to GPIO controller 3 (30240000.gpio).(1)

  2. Access the GPIO:

    • GPIO3_IO16 corresponds to gpiochip2, line 16 in Linux
    • Use: gpioset gpiochip2 16=1 to set it high(1)
  3. In your C++ code:

    // Open GPIO chip 2 (gpio3)
    currentGpioChip = gpiod_chip_open_by_name("gpiochip2");
    currentGpioLine = 16;
    line = gpiod_chip_get_line(currentGpioChip, currentGpioLine);
    

The key fix is changing &gpio1 to &gpio3 in your overlay.(1)(2)

Best regards,
Toradex AI Assistant


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I did use initially gpio3 not &gpio1

The command below shows nothing.

cat /sys/kernel/debug/pinctrl/pinctrl-handles | grep -A2 “30240000.gpio”

PS. Can anyone jump in and take a look ?

What do you mean “initially”?
the suggested overlay looks OK. I’d add status = “okay” to the &GPIO3 node:

&gpio3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sodimm_64_gpio>;
	status = "okay";
};

You should see SODIMM 64 as line offset 16 on the GPIO3 controller.
Could you please specify which BSP you are using as base for you tcb?

which BSP you are using as base

Guessing, this is the answer

Software summary
------------------------------------------------------------
Bootloader:               U-Boot
Kernel version:           6.6.23-7.0.0-devel-g5545cedda0e3 #1-Torizon SMP PREEMPT Wed Aug 28 13:26:04 UTC 2024
Kernel command line:      root=LABEL=otaroot rootfstype=ext4 quiet logo.nologo vt.global_cursor_default=0 plymouth.ignore-serial-consoles splash fbcon=map:3 ostree=/ostree/boot.1/torizon/3eaf173f53ce793f5a773022c96c609e266ebb8c63ece19e4e3289fd53797690/0 clk-imx8mp.mcore_booted=1
Distro name:              NAME="Torizon OS with PREEMPT_RT"
Distro version:           VERSION_ID=7.0.0-devel-202409-build.1
Hostname:                 verdin-imx8mp-08745920
------------------------------------------------------------

Hardware info
------------------------------------------------------------
HW model:                 Toradex Verdin iMX8M Plus on Dahlia Board
Toradex version:          0063 V1.1B
Serial number:            08745920
Processor arch:           aarch64

I used gpio3 and never assigned to gpio1.

What I realized is that to open the line with C++ function gpiod_chip_get_line() I have to pass not GPIO number 80 from the line below:

gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio, 30220000.gpio:
...
 gpio-80  (SODIMM_64           )
...

Instead, I think I have to pass an offset that is 16 (GPIO3_IO16 3 - group, 16 - offset)

Is it correct ?

Thank you

Yes, that is correct.

This output:

gpiochip2: GPIOs 64-95, parent: platform/30220000.gpio
...
gpio-80 (SODIMM_64)

uses the old global GPIO numbering:

global GPIO number = chip base + line offset
                   = 64 + 16
                   = 80

But gpiod_chip_get_line() expects the line offset within the selected GPIO chip, not the global GPIO number. GPIO character-device lines are identified by offsets from 0 to number_of_lines - 1.

Hi,

I can open the pin successfully and when set it to high or low state , the command below shows correct value:

cat /sys/kernel/debug/gpio

When it has a HIGH state:

gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
gpio-0 (SODIMM_206 |WhiteKingLinux ) in lo

gpio-8 (SODIMM_218 |WhiteKingLinux ) in lo
gpio-11 (SODIMM_16 )
gpio-12 (SODIMM_155 |regulator-usb1-vbus ) out lo
gpio-13 (SODIMM_157 )
gpio-14 (SODIMM_185 |regulator-usb2-vbus ) out hi
gpio-15 (SODIMM_91 )
gpio-16 ( |WhiteKingLinux ) out hi

On LOW state:

gpiochip0: GPIOs 0-31, parent: platform/30200000.gpio, 30200000.gpio:
gpio-0 (SODIMM_206 |WhiteKingLinux ) in lo

gpio-8 (SODIMM_218 |WhiteKingLinux ) in lo
gpio-11 (SODIMM_16 )
gpio-12 (SODIMM_155 |regulator-usb1-vbus ) out lo
gpio-13 (SODIMM_157 )
gpio-14 (SODIMM_185 |regulator-usb2-vbus ) out hi
gpio-15 (SODIMM_91 )
gpio-16 ( |WhiteKingLinux ) out lo

But when we measure the real voltage on pin X19 - 11 - it is always 0 volts:

image

Can it be related that the command cat /sys/kernel/debug/gpio does not show SODIMM # for gpio-16 ? See above output HIGH LOW

Also Is the new pin value 0x184 is correct in the added Device Tree?

&iomuxc {
pinctrl_sodimm_64_gpio: sodimm64gpiogrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x184

;
};
};

Yes, the 0x184 is a correct value for GPIO pinmuxing.

Please try to use gpioset gpiochip2 16=1 and gpioset gpiochip2 16=0 commands and check votage level at sodimm 64

That worked.

PS.A little confusing that it is located in gpiochip0 but I have to still select chip 2 when set high/low.

Thanks again