Changing GPIO behaviour using Device Tree Overlay

Hi,

I am using a Verdin iMX8M Plus module (currently on a Verdin Development Board), trying to change the (GPIO) behaviour of different pins using Device Tree Overlay.

The way I test is by modifying overlays/verdin-imx8mp_hmp_overlay.dts, re-building it following the Toradex documentation, and then load the overlay using the Toradex documentation:

This is the lines I add to overlays/verdin-imx8mp_hmp_overlay.dts to change the configuration of a pin:

#include "imx8mp.dtsi"
#include "imx8mp-verdin.dtsi"
#include "imx8mp-pinfunc.h"

(.....)

&iomuxc {
	pinctrl_gpio1_io00_disabled: disable_pinctrl_gpio1_io00 {
		fsl,pins = <MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x0F>;
	};
};

&gpio1 {
	gpio1_io00: gpio1_io00_output {
		gpio-hog;
		gpios = <0 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "gpio1_io00_output";
		status = "okay";
	};
};

But the direction of GPIO 1 0 (gpiochip0 0 - SODIMM_206) does not change.

Can you lead me in the correct direction of handling GPIOs using Device Tree Overlays?

Hi, I’m the Toradex AI Assistant. The Toradex Support team will follow up with you shortly!

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:+1: :-1:


Hello,

To address the issue of changing GPIO behavior using Device Tree Overlays on your Verdin iMX8M Plus module, let’s ensure that your overlay is correctly configured and applied.

  1. Verify Pin Control Configuration:

    • Ensure that the pin control node is correctly defined in your overlay. The iomuxc node should include the correct pin settings, as you have done with pinctrl_gpio1_io00_disabled. Double-check the pin function and control settings to ensure they match the intended configuration.
  2. Check GPIO Node Configuration:

    • The GPIO node should be correctly defined with the gpio-hog property, as you have done. Ensure that the gpios property is correctly set, and the output-high or output-low directive is used as needed.
  3. Overlay Application:

    • After modifying the overlay, ensure it is compiled into a .dtbo file and placed in the correct location on the boot partition.
    • Update the overlays.txt file to include your custom overlay and run the sync command before rebooting the system. This ensures that changes are written to the file system.
  4. Check for Conflicts:

    • Ensure there are no conflicting overlays or pre-enabled overlays that might override your settings. You can list the currently applied overlays to verify this.
  5. Reboot Properly:

    • After making changes, reboot the system without power-cycling to ensure the overlay is applied correctly.

By following these steps, you should be able to modify the GPIO behavior as intended. If the issue persists, double-check the syntax and ensure there are no typos or misconfigurations in your overlay file.

Best regards,
Toradex AI Assistant

Please, also check if these links can help you solve your problem:

Verdin iMX8M - Device Tree Overlay, GPIO Output, Default State.

Hello @erikr,

I see that you are using the verdin-imx8mp_hmp_overlay.dts overlay, which is intended for use cases with the Cortex-M7 core.
Do you want to configure the pinmuxing for the Cortex-M7 in the device tree?
If yes, this is not possible. the Cortex-M7 needs to configure the pinmuxing for the pins which it will use. The device tree must not use such pins to avoid conflicts between Linux and the Cortex-M.

Otherwise, the issue you see with the gpio1_io00 configuration looks to be due to the fact that from your device tree overlay snippet, pinctrl_gpio1_io00_disabled is not added to pinctrl-0 from iomuxc.
Therefore, the following additional entry would be needed in your iomuxc node:

pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
		    <&pinctrl_gpio3>, <&pinctrl_gpio4>,
		    <&pinctrl_gpio7>, <&pinctrl_gpio8>,
		    <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>, <&pinctrl_gpio_hog4>,
		    <&pinctrl_hdmi_hog>, <&pinctrl_gpio1_io00_disabled>;

Additionally, please note that the pad configuration of 0x0F is setting reserved register bits in the SW_PAD_CTL_PAD_GPIO1_IO00 SW PAD Control Register, the recommended values for GPIOs are usually 0x1c4 (Weak pull-up) or 0x184 (Weak pull-down).
For more details, please check Section 8.2.4.153 SW_PAD_CTL_PAD_GPIO1_IO00 SW PAD Control Register (IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO00) of the i.MX8MP Reference Manual.

Best Regards,
Bruno

Thank you @bruno.tx

I will do some more testing and let you know.

Hi @bruno.tx

I have done some testing now, and created my own .dts file:

/dts-v1/;
/plugin/;

#include "imx8mp.dtsi"
#include "imx8mp-verdin.dtsi"
#include "imx8mp-pinfunc.h"

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
			    <&pinctrl_gpio3>, <&pinctrl_gpio4>,
			    <&pinctrl_gpio7>, <&pinctrl_gpio8>,
			    <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>, <&pinctrl_gpio_hog4>,
			    <&pinctrl_hdmi_hog>, <&pinctrl_gpio4_io24_config>;

	/* LED 0 */
	pinctrl_gpio4_io24_config: gpio4_io24_pullup {
		fsl,pins = <
			MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x1c4 /* Weak pull-up */
		>;
	};
};

&gpio4 {
	/* LED 0 */
	gpio4_io24: gpio4_io24_output {
		gpio-hog;
		gpios = <24 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "gpio4_io24_output";
		status = "okay";
	};
};

Unfortunately, when I include the built overlay file (I have verified that the include process itself work), GPIO4 IO24 is not changed to output.

Do you see what is wrong with this .dts file?

Hello @erikr,

Thanks for the update.
Are you trying to use SAI2_TXFS (SODIMM_133) or GPIO1_IO00 (SODIMM_206)?
Regardless of the pin(s) you want to use, you need to make sure they are not used elsewhere in your device tree.

Another relevant point here is that the following includes should not be used in your device tree overlay:

#include "imx8mp.dtsi"
#include "imx8mp-verdin.dtsi"

These are .dtsi files which are part of your base device tree and should not be included in your overlay. By doing so, it is likely that you are reverting some of the board-specific configuration present in your device tree.

Best Regards,
Bruno

@bruno.tx
Thanks for the quick reply!

I am trying to configure/use SODIMM_133.
How I understands it, this value:
MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24
Says, “MUX the SAI2_TXFS to being GPIO4_IO24”.
Is this correct?

Hello @erikr,

Your understanding is correct, the MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 configures the SAI2_TXFS pin (SODIMM_133) to be a GPIO.

What may be the problem here is that this pin is used somewhere else in your device tree.
In this case, it is used in pinctrl_uart1: imx8mp-verdin.dtsi « freescale « dts « boot « arm64 « arch - linux-toradex.git - Linux kernel for Apalis, Colibri and Verdin modules
Which is used by uart1: imx8mp-verdin.dtsi « freescale « dts « boot « arm64 « arch - linux-toradex.git - Linux kernel for Apalis, Colibri and Verdin modules

Therefore, to use this pin you need to disable the uart1 node.

To configure pins with non-default configurations, you always need to search for the current configuration on the device tree and make sure it is not being used.

Best Regards,
Bruno