Memory layout on an iMX8M-Plus

This topic is similar to what has been asked for an iMX8M-Mini some months ago.
The detailed explanations given by @hfranco.tx in that topic are quite clear, even if a little bit tricky to understand. And I’m not sure if the fixes mentioned in the topic have already ben applied to the KB.
The memory layout described here has a couple of typos (yellow background in the following picture):

  • given that the 64-bit starting address for the DDR is 0x1_000000000 (this is clear), the 2GB are from 0x00000000 - 0x7FFFFFFF and not 0x00000000 - 0x3FFFFFFF (that is 1 GB)
  • the full DRAM range is 0x1_00000000 - 0x2_3FFFFFFF and not 0x1_00000000 - 0x2_FFFFFFFF

Does this sound right?

Hi @vix !

From i.MX8MP’s Reference Manual, we have:

So we have:

  • Full 5120 MB DRAM range with 64 bit addressing accessible from Cortex-A53: 1_0000_0000 - 2_3FFF_FFFF
  • 3072 MB DRAM range with 32 bits addressing accessible from Cortex-A53: 4000_000 - FFFF_FFFF
  • 2048 MB DRAM range with 32 bits addressing accessible from Cortex-A53: 4000_000 - BFFF_FFFF
  • 2048 MB DRAM range with 32 bits addressing accessible from Cortex-M7: 4000_0000 - BFFF_FFFF

Thanks for bringing this up!

We will fix it :slight_smile:

Best regards,

Hi @vix !

This is fixed.

Best regards,

Hi @henrique.tx
thanks.

I add another doubt from my side:
I see that Toradex has this SoM which has 8GB of RAM, and I so I assume that iMX8M-Plus can handle up to 8 GB of RAM on the Cortex-A side (otherwise it has no sense mounting 8 GB ot the SoM).
This matches what I see on the datasheet
immagine

5120 MB + 3072 MB = 8192 MB = 8GB
And so I think that the notice


should be
(*1): Full DRAM range is 0x4000_0000 - 0x2_3FFF_FFFF. Only a part (2048MB) of the DRAM is accessible by the M7 cores.

Does this sound ok to you?