Inline ECC on IMX8MP

There was an older post here from 2021[1] where it is claimed that, even though Toradex advertises the feature, the BSP doesn’t offer support to IMX8MP inline ecc feature.
Considering that this feature has not been removed from newer NXP processors, is there any update on Toradex supporting it?

Best regards,

Luan Cardoso dos Santos, PhD.


  1. Link to the original post: ECC support on Verdin Plus modules - #2 by daniel_m.tx ↩︎

Hi, I’m the Toradex AI Assistant.

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Based on the available documentation, the status of inline ECC support remains unchanged from the 2021 discussion (1). According to the community forum thread, Toradex has not implemented inline ECC support into their BSP (1).

Current Status

The most recent update from June 2024 indicates that while Toradex hasn’t implemented inline ECC support in their BSP, the Verdin iMX8MP SoC does have hardware support for inline ECC (1). NXP provides documentation on how to enable this feature through their application note AN13566 (1).

Hardware Capability vs BSP Implementation

The i.MX 8M Plus processor datasheet confirms that the hardware supports DRAM Inline ECC for high industrial system reliability and safety applications. However, this hardware capability requires BSP-level implementation to be functional, which Toradex has not yet provided (1).

Alternative Approach

If inline ECC is a requirement for your project, you would need to implement the feature yourself using NXP’s documentation as a reference (1). This would involve customizing the BSP to enable the inline ECC functionality that exists at the hardware level.

To get the most current information about any potential plans for inline ECC support, I’d recommend checking these resources:

Would you like a general answer based on my knowledge about implementing ECC support, or do you have specific questions about your hardware setup and requirements?

Best regards, Toradex AI Assistant.


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Hi @luanCardoso!

We don’t currently support inline ECC in our BSPs. However, as you said, it is supported by the hardware (SoC), so it could be implemented, but unfortunately, it is not on our roadmap right now.

Best regards.