iMX8MP: Generating clock at pin 91 CLKO2 pin

Fide · March 28, 2022, 10:19am

Hi,

We want to generate 100Mhz CLK output from the SoM to an external FPGA.
For that we have planned to use pin 91 (CLKO2) of iMX8M-Plus SoM and I configured DTS file as below:

    pinctrl_additionalgpio: additionalgpios {
        fsl,pins = <
            ..
            // according to 8.2.4.299 SW_PAD_CTL_PAD_CLKOUT2 SW PAD Control Register
            MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2          0x16               /* SODIMM 91    - CLKOUT2 */
        >;

But I see just zero on the pin. Do you know what shall we do to get clock out at 100 Mhz from this pin?

Thank you.