Device tree to get internal 32kHz frequency

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Hello Mathias,

Thank you for sharing your updated overlay, methodology, and results. Your device tree overlay looks well-structured, and you’re using the correct pad (MX6QDL_PAD_GPIO_0__CCM_CLKO1) with the mux value 0x1b0b0, which is appropriate for CLKO1 on SODIMM 55 (X9.17 on the Viola 1.2 board). Your clock assignment and pinmux setup appear correct.

Let’s walk through a few possible reasons why you might not be seeing a clock on X9.17 and how to debug it:

1. Physical Pin Mapping

Please double-check that X9.17 on your Viola 1.2 is wired to Colibri SODIMM 55, which maps to CLKO1 (GPIO1_IO00). If the hardware mapping is wrong, no further configuration will work.

2. Verify Overlay is Active

You’ve stated that dtconf reports the overlay is enabled. Let’s confirm it’s merged into the live device tree:

dtc -I fs -O dts /proc/device-tree > /tmp/running.dts
# Search for your pinctrl_clko1, assigned-clocks, and clko1/ccm entries in /tmp/running.dts

3. Check Kernel Debugging Info

Check that the pinmux and clock assignments are active post-boot:

cat /sys/kernel/debug/pinctrl/*/pinmux-pins | grep -i clko
cat /sys/kernel/debug/pinctrl/*/pins | grep -i gpio0
cat /sys/kernel/debug/clk/clk_summary | grep -i clko
dmesg | grep ccm

You should see the CLKO1 pinmuxed and the clock enabled and running.

4. Oscilloscope

Use an oscilloscope or frequency counter to verify the output. The CLKO signal is a hardware-driven clock; it will not show up in gpio direction or value files.

5. Try a Different Clock Rate

Some measurement tools can’t detect high frequencies. Try switching to 32.768kHz to see if you detect anything, just to confirm signal routing.

6. Overlay Redundancy

Some fragments, such as multiple disables, can be omitted if not strictly needed. However, they should not interfere with CLKO as long as there are no pin conflicts.

Summary of Key Overlay Fragments

/ {
    assigned-clocks = <&clks 133>;
    assigned-clock-parents = <&clks 4>;
    assigned-clock-rates = <24000000>;
};

&iomuxc {
    pinctrl_clko1: clko1grp {
        fsl,pins = <
            MX6QDL_PAD_GPIO_0__CCM_CLKO1  0x1b0b0
        >;
    };
};

&ccm {
    clko1 {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_clko1>;
    };
};

7. Swap to Other Pads (Debugging)

If SODIMM 55 is, for some reason, unresponsive, you can temporarily test redirecting CLKO1 to another pin you’re sure is accessible.

If after the above verification steps there’s still nothing at X9.17 (SODIMM 55), please let me know:

  • What you observe using an oscilloscope (even if it looks “flat”)
  • The output of pin and clock debug files above

Further, let me know the Torizon OS version with cat /etc/os-release.

Useful Resources

Let’s proceed with these debug steps and share your findings!

Best regards,
Toradex AI Assistant.