Disable RTS and CTS pins for UART2 on Verdin iMX8M-Plus

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1

I’ve already customized Torizon OS for Verdin iMX8M-Plus and used successfully a custom device tree (not overlay) with /delete-property/to delete some properties.
Now I see that UART2 is configured in imx8mp-verdin.dtsi with RTS and CTS pins
https://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi?h=toradex_5.15-2.2.x-imx#n910

/* Verdin UART_2 */
&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	uart-has-rtscts;
};

If I use a custome device tree to disable the whole uart2 peripheral on Torizon OS side

/* Disable Verdin UART_2 on Torizon OS side */
&uart2 {
	status = "disabled";
};

the peripheral is properly disabled and I can control all the pins RX, TX, RTS and CTS from M7 core.
So this is ok.

But if I try to disable only RTS and DTS from my custom device tree

/* Verdin UART_2 without RTS and CTS */
&uart2 {
	status = "ok";
	/delete-property/ uart-has-rtscts;
};

it doesn’t work and I can control RTS and CTS pins from M7 core.
They’re set high from Torizon OS.

Does someone know why this happens?

2

Hi, I’m the Toradex AI Assistant. The Toradex Support team will follow up with you shortly!

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Based on the context provided, it seems that the issue arises from the behavior of the UART driver in Torizon OS, which may not respect the removal of the uart-has-rtscts property dynamically. Here are some steps and considerations that might help address the issue:

  1. Driver Behavior: The UART driver might be designed to enable RTS and CTS pins by default when the UART is active, regardless of the device tree settings. This could be why removing the uart-has-rtscts property does not have the desired effect.

  2. OS Management: Torizon OS might have routines that enforce the use of RTS and CTS pins, potentially overriding the device tree settings. This could be due to additional configurations or kernel parameters that are not immediately visible in the device tree.

  3. Default Configuration: The default configuration for the UART2 peripheral might still be active, causing the RTS and CTS pins to be set high by Torizon OS.

Recommendations:

  • Investigate the UART Driver: Review the source code of the UART driver in Torizon OS to understand how it handles RTS and CTS pins. Check if there are any conditions or settings that might override the device tree modifications.

  • Check for Additional Configurations: Look for other device tree properties or kernel parameters that might influence the behavior of the UART2 peripheral and its pins. There might be additional settings that need to be adjusted.

  • Consult Documentation and Community: Refer to the Torizon OS documentation and community forums for any insights or known issues related to UART configurations and RTS/CTS pin control.

  • Consider Complete Disabling: If partial disabling continues to fail, consider disabling the entire UART2 peripheral when RTS and CTS are not needed, as this approach has been confirmed to work.

If these steps do not resolve the issue, further investigation into the specific implementation details of Torizon OS and the UART driver may be necessary.

Please, also check if these links can help you solve your problem:

imx6ULL custom device tree.

3

Hello @vix,

I think the cause of this behavior is that the pins are still muxed to the RTS/CTS.
This is defined in pinctrl_uart2, which is used by uart2: imx8mp-verdin.dtsi « freescale « dts « boot « arm64 « arch - linux-toradex.git - Linux kernel for Apalis, Colibri and Verdin modules

Removing these entries from pinctrl_uart2 should leave the pins available for the Cortex-M.

Best Regards,
Bruno

4

Hi @bruno.tx
I’ve been able to fix it with the following .dts

&uart2 {
  status = "okay";
  /delete-property/ uart-has-rtscts;
};

&iomuxc {
    pinctrl_uart2: uart2grp {
        fsl,pins = <
            /* RX and TX pins only */
            MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX       0x1c4 /* SODIMM 137 */
            MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX       0x1c4 /* SODIMM 139 */
        >;
    };
};
1 Like
5

Hello @vix,

Thanks for the update.

Best Regards,
Bruno