Configuring chip select for SPI

I need to enable SPI0 to use CS3 (only), and I’m afraid I remain baffled by the device tree – I would be very grateful for advice!

My device tree is based on vf500-colibri-eval-v3.dts, with my customisations replacing vf-colibri-eval-v3.dtsi. At present I have device node /dev/spidev0.0 present (whereas presumably I should see /dev/spidev0.3), and CS3 is not activated when driving this device.

I have the following entries in my device tree (plus a / node, &uart0, a working &dspi1 on its CS0, and some other immaterial fields):

&dspi0 {
    bus-num = <0>;
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_dspi0>;
    status = "okay";

    spidev0: spidev@0 {
        compatible = "toradex,evalspi";
        reg = <0>;
        spi-max-frequency = <10000000>;     /* 10 MHz */
        status = "okay";

&iomuxc {
    vf610-colibri {
        /* Override of original hog group. */
        pinctrl_hog_0: hoggrp-0 {
            fsl,pins = < /* Pins elided */ >;

        pinctrl_dspi0: dspi0grp {
            fsl,pins = <
                VF610_PAD_PTC0__DSPI0_CS3       0x1182
                VF610_PAD_PTB20__DSPI0_SIN      0x1181
                VF610_PAD_PTB21__DSPI0_SOUT     0x1182
                VF610_PAD_PTB22__DSPI0_SCK      0x1182

The dspi0 settings were largely copied from vf610-twr.dts, but clearly simply changing the CS pin isn’t enough.

Can I please have a response to this question?

The @0 in your spidev0 specification means that you want to use CS0. The same applies to reg = <0> which by definition has to be set to the same value as it’s group’s @ value. So to use CS3 you would need to specify @3 and reg = <3>. Makes sense? Further documentation about the topic may be found here:

Thank you, that’s very helpful. I’m confused about the role of cs-gpios here, which presumably I don’t need? And (which fortunately I don’t need), what would I write if I wanted multiple CS devices; would I write multiple spidevn: spidev@n{... reg=<n>;...} blocks?

You are welcome.
Yes, you need to create a different spidev node for each chip select (each spi slave).

Best regards,