we will be designing a custom carrier board which has the second Ethernet interface from iMX8QM brought out via a KSZ8041 PHY as recommended in the apalis imx8 datasheet.
We are using Torizon with the docker containers. I wanted to know to enable the second Ethernet what changes need to be done.
Are the drivers for the KSZ8041 in the default torizon image or do we have to make a custom torizon image ?
What additional steps need to be done to have the second Ethernet working ? device overlay, network interface configuration ?
Let me try and answer your questions here one by one.
Are the drivers for the KSZ8041 in the
default torizon image or do we have to
make a custom torizon image?
The default Torizon configuration should have CONFIG_MICREL_PHY which should be the in tree Linux driver for this PHY.
What additional steps need to be done
to have the second Ethernet working ?
device overlay, network interface
configuration ?
Off the top of my head you’ll probably need some kind of configuration in the device tree that encapsulates the PHY so that the kernel can access it. As for network configuration I don’t believe you need anything fancy but this may differ based on how you want to use the interface.
Unfortunately I can’t give you more detailed examples of changes and configuration that you’ll need to do. I don’t believe we have any reference designs or examples of such but I can take another look and perhaps someone else here in Toradex has a better idea.
While we don’t have an overlay for a second ethernet on the i.MX8 we do have a reference device tree which implements a second ethernet, but for our Colibri Vybrid modules.
So not everything will apply 1 to 1 with the i.MX8 but the general concepts will. For example in the device tree you’ll need to identify an additional fec node to represent the additional ethernet and phy. You’ll also need to mess with the pin muxings to route the needed pins to your phy.
I assume you are talking about the Apalis IMX8QM if yes read the text below. Please always specify the SOM module you are talking about!!
Ethernet: !!!
Make sure you have at least IMX8QM V1.1
The Ethernet MAC Interface is only supporting 1.8 to 2.5 volts as specified from now on. All the IMX.8 modules that will final production ones will only be specified for 1.8 or 2.5.
So you interface on the Ethernet side needs to be changed we recommend 1.8 volt.
The secondary Ethernet on the Apalis IMX8 (MAC) is can be switch to 1.8volt or 2.5volt via device tree. The port of the IMX8 will be switched to 1.8volt.
The MDC and MDIO signal remains at 3.3 volts on the iMX8 side.
So you need level shifting from 3.3 to 1.8 of the Switch since you need to operate the switch at 1.8volt.
The reset should also be shifted to 1.8 volts.
The 22 ohms resistor R27 in the clock line RGMII_REF_CLK should be left away or best up there a 0-ohm resistor
the RGMII device we are using here as the Interface need also 1.8 Volt Strapping pull-ups for the configuration.
Here is a little ref. Schematic with an ethernet PHY.
The Apalis IMX8QM module is in the title of the post and as well in first post environment information section. we are using IMX8QM V1.1 boards. we have as one of the V1.0 series. but we will be using mainly the 1.1 version.
for the second Ethernet port we are using it in RMII mode and not RGMII mode. which according to the datasheet should work as well in 3.3 volts. The KSZ8041 PHY operates in RMII mode.
my question was related to the device tree overlay modifications required to get it working.
i managed to get further with your help. i am able to deploy this overlay but the system hangs on the starting kernel line and reboots 3 times and switches back to the rollback overlay.
i had to comment the line 59 power-domains = <&pd IMX_SC_R_BOARD_R1>; to get it to built. uncommenting this line gives a syntax error.
U-Boot 2020.04-5.1.0+git.0a26a04408ca (Jan 01 1970 - 00:00:00 +0000)
CPU: NXP i.MX8QM RevB A53 at 1200 MHz
DRAM: 4 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Model: Toradex Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT V1.1B, Serial# 06738425
BuildInfo:
- SCFW 732e719a, SECO-FW 376e3c15, IMX-MKIMAGE 6745ccdc, ATF
- U-Boot 2020.04-5.1.0+git.0a26a04408ca
switch to partitions #0, OK
mmc0(part 0) is current device
flash target is MMC:0
Net: eth0: ethernet@5b040000
Fastboot: Normal
Saving Environment to MMC... Writing to MMC(0)... OK
Normal Boot
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc0(part 0) is current device
Scanning mmc 0:1...
Found U-Boot script /boot.scr
1007 bytes read in 11 ms (88.9 KiB/s)
## Executing script at 83100000
4394 bytes read in 23 ms (186.5 KiB/s)
162801 bytes read in 36 ms (4.3 MiB/s)
35 bytes read in 27 ms (1000 Bytes/s)
Applying Overlay: apalis-imx8_eth2.dtbo
1357 bytes read in 35 ms (37.1 KiB/s)
12136124 bytes read in 296 ms (39.1 MiB/s)
Uncompressed size: 30505472 = 0x1D17A00
9168678 bytes read in 228 ms (38.4 MiB/s)
## Flattened Device Tree blob at 83000000
Booting using the fdt blob at 0x83000000
Loading Ramdisk to fcd90000, end fd64e726 ... OK
Using Device Tree in place at 0000000083000000, end 000000008304afff
Starting kernel ...
That’s interesting, though I’m not completely sure of the effects of commenting that line. So with this line commented and with the overlay applied you can boot into the kernel then?
What you can do is redefine the pinctrl-0 here in the overlay. Basically you’ll just copy and paste the definition in the device tree but remove the pinctrl_fec2_gpios, group from the list. This “should” free these pins up for alternate usage.
thanks for your help. i have a booting kernel and i can see the second ethernet device showing up and i can see the PHY chip being picked up. I dont have the interface working yet but this could be something electrical.
apalis-imx8-06738425:~$ dmesg | grep fec
[ 1.586618] fec 5b040000.ethernet: Adding to iommu group 1
[ 1.587563] fec 5b050000.ethernet: Adding to iommu group 1
[ 1.588541] fec 5b050000.ethernet: Invalid MAC address: 00:00:00:00:00:00
[ 1.595352] fec 5b050000.ethernet: Using random MAC address: ae:51:0a:77:45:5a
[ 1.596564] libphy: fec_enet_mii_bus: probed
[ 1.599629] fec 5b050000.ethernet eth0: registered PHC device 0
[ 2.004186] libphy: fec_enet_mii_bus: probed
[ 2.008645] fec 5b040000.ethernet eth1: registered PHC device 1
[ 6.782953] fec 5b040000.ethernet ethernet0: renamed from eth1
[ 103.419724] fec 5b040000.ethernet ethernet0: Link is Up - 100Mbps/Full - flow control rx/tx
apalis-imx8-06738425:~$ dmesg | grep 5b050000
[ 1.587563] fec 5b050000.ethernet: Adding to iommu group 1
[ 1.588541] fec 5b050000.ethernet: Invalid MAC address: 00:00:00:00:00:00
[ 1.595352] fec 5b050000.ethernet: Using random MAC address: ae:51:0a:77:45:5a
[ 1.599629] fec 5b050000.ethernet eth0: registered PHC device 0
[ 7.992109] Micrel KSZ8041RNLI 5b050000.ethernet-1:01: attached PHY driver [Micrel KSZ8041RNLI] (mii_bus:phy_addr=5b050000.ethern
In our design we are using the clock supplied by the KSZ8041RNLI PHY
besides setting the IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK50M_IN 0x06000040 is there anything additional that needs to be specified to tell the imx8 MAC to use this external clk
And other than setting the RCLK out pin they also seem to set this tja110x,refclk_in; property in the mdio node. This may also be required though I couldn’t find much documentation on this property and it may be hardware specific to the chosen PHY.
could there be an already existing clock being sent out from the imx8 on that pin ? is there a way to check this on the device tree where the clock is defined for ethernet
Sorry, which pin are you referring to? RCLK_IN or RCLK_OUT? As far as I can these are just 50MHZ reference clocks either from the MAC to the PHY or vice versa depending on in/out.
