Adding GPIO to device tree overlay

Technical Support
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1

Hi,

I wan’t to add some UARTs and GPIO’s via my device tree overlay for our project and i got as far that i can now see the GPIO’s using gpiofind and i can also see them using “/sys/kernel/debug/gpio”.

However when i try to set on of the new GPIO’s the output pin wont budge.
it remains at the ±0,8V level.

Module is the Verdin AM62 512MB non wifi/bt.

The io’s i want to add are the following:
SO_DIMM pins
32
36
59
57
199
201
203
205
207
215
217
219
30
34
141
143

According to the pinout designer these pins are all ‘Possible’ but not standard so i recon i needed to add these via a device tree overlay.

I based my device tree on the the following:
image base: torizon-core-docker-verdin-am62-Tezi_6.7.0+build.18.tar
DTS file: k3-am62-verdin-nonwifi-mallow.dts

And my custom overlay file contains the following (based is off of the SPI dev overlay file):
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*

  • Copyright 2023 Toradex
    */

// Verdin AM62 spidev

/dts-v1/;
/plugin/;

#include <…/arch/arm64/boot/dts/ti/k3-pinctrl.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
compatible = “toradex,verdin-am62”;
};

/* Verdin SPI_1 / / removed onboard TPM module from ‘k3-am62-verdin-mallow.dtsi’ */
&main_spi1 {
#address-cells = <1>;
#size-cells = <0>;
status = “okay”;
};

/* Verdin I2C_1 / / removed onboard EEPROM and temp. sensor module from ‘k3-am62-verdin-mallow.dtsi’ */
&main_i2c1 {
status = “okay”;
};

/* UART 1,2,3,4 are enabled from ‘k3-am62-verdin-mallow.dtsi’ / / define and enable UART 8 /
/ Verdin SD_1 / / Disabled from ‘k3-am62-verdin-mallow.dtsi’, need these pins for UART 8 and UART 5 */
&sdhci1 {
status = “disabled”;
};

/* Verdin UART_8 /
&main_pmx0 {
pinctrl_uart8: main-uart3-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0244, PIN_INPUT_PULLUP, 3) / (C17) MMC1_SDWP.UART3_CTSn / / SODIMM 17 / / Physical Address F4244h /
AM62X_IOPAD(0x0240, PIN_OUTPUT, 3) / (D17) MMC1_SDCD.UART3_RTSn / / SODIMM 84 / / Physical Address F4240h /
AM62X_IOPAD(0x0234, PIN_INPUT_PULLUP, 3) / (B22) MMC1_CLK.UART3_RXD / / SODIMM 78 / / Physical Address F4234h /
AM62X_IOPAD(0x023C, PIN_OUTPUT, 3) / (A21) MMC1_CMD.UART3_TXD / / SODIMM 74 / / Physical Address F423Ch */
>;
};
};

&main_uart3 {
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_uart8>;
status = “okay”;
};

/* Verdin UART_5 /
&main_pmx0 {
pinctrl_uart5: main-uart5-pins-default {
pinctrl-single,pins = <
AM62X_IOPAD(0x0074, PIN_INPUT_PULLUP, 2) / (U25) GPMC0_AD14.UART5_RXD / / SODIMM 76 / / Physical Address F4074h /
AM62X_IOPAD(0x0078, PIN_OUTPUT, 2) / (U24) GPMC0_AD15.UART5_TXD / / SODIMM 21 / / Physical Address F4078h */
>;
};
};

&main_uart5 {
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_uart5>;
status = “okay”;
};

/* Add alias for serial port */
&{/} {
aliases {
/delete-property/ sdhci1;
serial5 = “/bus@f0000/serial@2830000”;
serial6 = “/bus@f0000/serial@2850000”;
};
};

/* Remaining GPIO’s /
&main_gpio0 {
gpio-line-names =
“SODIMM_52”, / 0 /
“”,
“”,
“SODIMM_56”,
“SODIMM_58”,
“SODIMM_60”,
“SODIMM_62”,
“”,
“”,
“”,
“”, / 10 /
“SODIMM_54”,
“SODIMM_64”,
“”,
“”,
“SODIMM_174”,
“SODIMM_172”,
“SODIMM_59”,
“SODIMM_57”,
“”,
“”, / 20 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“SODIMM_76”,
“SODIMM_21”, / 30 /
“SODIMM_256”,
“SODIMM_252”,
“”,
“SODIMM_46”,
“SODIMM_42”,
“SODIMM_218”,
“”,
“SODIMM_189”,
“”,
“SODIMM_216”, / 40 /
“SODIMM_220”,
“SODIMM_222”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 50 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 60 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 70 /
“SODIMM_157”,
“SODIMM_187”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 80 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“SODIMM_219”, / 90 */
“SODIMM_217”;
};

&main_gpio1 {
gpio-line-names =
“SODIMM_215”, /* 0 /
“SODIMM_199”,
“”,
“SODIMM_201”,
“SODIMM_203”,
“SODIMM_205”,
“SODIMM_207”,
“”,
“”,
“SODIMM_36”,
“SODIMM_34”, / 10 /
“SODIMM_30”,
“SODIMM_32”,
“”,
“”,
“SODIMM_15”,
“SODIMM_16”,
“SODIMM_19”,
“SODIMM_66”,
“SODIMM_161”,
“”, / 20 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 30 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 40 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“SODIMM_17”,
“SODIMM_155”, / 50 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 60 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 70 /
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, / 80 */
“”,
“”,
“”,
“”,
“”,
“”,
“”;
};

&mcu_gpio0 {
gpio-line-names =
“SODIMM_244”,
“SODIMM_206”,
“SODIMM_208”,
“”,
“”,
“”,
“”,
“”,
“”,
“”,
“”, /* 10 */
“SODIMM_143”,
“SODIMM_141”,
“”,
“”,
“”,
“”,
“SODIMM_59”,
“SODIMM_57”,
“”,
“”,
“”,
“”,
“”;
};

&main_pmx0 {
/* UART 2, disable RTS and CTS, enabled via ‘K3-am62-verdin.dtsi’ /
pinctrl_wkup_uart0: wkup-uart0-pins-default {
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x0024, PIN_INPUT_PULLUP, 0) / (B4) WKUP_UART0_RXD / / SODIMM 137 /
AM62X_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) / (C5) WKUP_UART0_TXD / / SODIMM 139 */
>;
};

pinctrl_gateway_board_inputs: gateway-input-pins-default {
	pinctrl-single,pins = <
		AM62X_IOPAD(0x00C, PIN_INPUT, 7) /* (E25)  OSPI0_D0.GPIO0_3 */ /* SODIMM 56 */ /* g_gpio_expansion_1_io_a */ /* Physical Address F400Ch */	
		AM62X_IOPAD(0x0010, PIN_INPUT, 7) /* (G24)  OSPI0_D1.GPIO0_4  */ /* SODIMM  58 */ /* g_gpio_expansion_1_io_reset */ /* Physical Address F4010h */
		AM62X_IOPAD(0x0014, PIN_INPUT, 7) /* (F25)  OSPI0_D2.GPIO0_5 */ /* SODIMM  60 */ /* g_gpio_expansion_2_io_a */ /* Physical Address F4014h */
		AM62X_IOPAD(0x0018, PIN_INPUT, 7) /* (F24)  OSPI0_D3.GPIO0_6 */ /* SODIMM  62 */ /* g_gpio_expansion_2_io_b */ /* Physical Address F4018h */
		AM62X_IOPAD(0x0030, PIN_INPUT, 7) /* (G21)  OSPI0_CSn1.GPIO0_12  */ /* SODIMM  64 */ /* g_gpio_expansion_2_io_reset */ /* Physical Address F4030h */
		AM62X_IOPAD(0x01C0, PIN_INPUT, 7) /* (B13)  SPI0_D0.GPIO1_18 */ /* SODIMM  66 */ /* g_gpio_expansion_2_io_interrupt */ /* Physical Address F41C0h */
		AM62X_IOPAD(0x01A8, PIN_INPUT, 7) /* (D20)  MCASP0_AFSX.GPIO1_12 */ /* SODIMM  32 */ /* g_gpio_junction_box_1_fault_efuse */ /* Physical Address F41A8h */
		AM62X_IOPAD(0x019C, PIN_INPUT, 7) /* (B18)  MCASP0_AXR1.GPIO1_9  */ /* SODIMM  36 */ /* g_gpio_junction_box_2_fault_efuse */ /* Physical Address F419Ch */
		AM62X_IOPAD(0x0124, PIN_INPUT, 7) /* (A23)  MMC2_SDCD.GPIO0_71 */ /* SODIMM  157 */ /* g_gpio_usb_fault_efuse */ /* Physical Address F4124h */
		
		/* MCU domain pins */
		AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 7) /* (A8) MCU_I2C0_SCL.MCU_GPIO0_17 */ /* SODIMM 59 */ /* g_gpio_expansion_1_io_interrupt */ /* Physical Address 4084044h */		
		AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 7) /* (D10) MCU_I2C0_SDA.MCU_GPIO0_18  */ /* SODIMM 57 */ /* g_gpio_expansion_1_io_b */ /* Physical Address 4084048h */
	>;
};

pinctrl_gateway_board_outputs: gateway-output-pins-default {
	pinctrl-single,pins = <
		AM62X_IOPAD(0x017C, PIN_OUTPUT, 7) /* (AD22) RGMII2_RX_CTL.GPIO1_1 */ /* SODIMM  199 */ /* g_gpio_expansion_1_uart_ri */ /* Physical Address F417Ch */
		AM62X_IOPAD(0x0184, PIN_OUTPUT, 7) /* (AE23) RGMII2_RD0.GPIO1_3 */ /* SODIMM  201 */ /* g_gpio_expansion_1_uart_dtr */ /* Physical Address F4184h */
		AM62X_IOPAD(0x0188, PIN_OUTPUT, 7) /* (AB20) RGMII2_RD1.GPIO1_4 */ /* SODIMM  203 */ /* g_gpio_expansion_1_uart_dcd */ /* Physical Address F4188h */
		AM62X_IOPAD(0x018C, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */ /* SODIMM  205 */ /* g_gpio_expansion_1_uart_dsr */ /* Physical Address F418Ch */
		AM62X_IOPAD(0x0190, PIN_OUTPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */ /* SODIMM  207 */ /* g_gpio_expansion_1_uart_ck */ /* Physical Address F4190h */
		AM62X_IOPAD(0x009C, PIN_OUTPUT, 7) /* (V25) GPMC0_WAIT1.GPIO0_38 */ /* SODIMM  189 */ /* g_gpio_expansion_2_spi_cs */ /* Physical Address F409Ch */
		AM62X_IOPAD(0x0178, PIN_OUTPUT, 7) /* (AC20) RGMII2_TD3.GPIO1_0 */ /* SODIMM  215 */ /* g_gpio_expansion_2_uart_ri */ /* Physical Address F4178h */
		AM62X_IOPAD(0x00A4, PIN_OUTPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40  */ /* SODIMM  216 */ /* g_gpio_expansion_2_uart_dtr */ /* Physical Address F40A4h */
		AM62X_IOPAD(0x0174, PIN_OUTPUT, 7) /* (AD21) RGMII2_TD2.GPIO0_91 */ /* SODIMM  217 */ /* g_gpio_expansion_2_uart_dcd */ /* Physical Address F4174h */
		AM62X_IOPAD(0x0094, PIN_OUTPUT, 7) /* (N20) GPMC0_BE1n.GPIO0_36  */ /* SODIMM  218 */ /* g_gpio_expansion_2_uart_dsr */ /* Physical Address F4094h */
		AM62X_IOPAD(0x0170, PIN_OUTPUT, 7) /* (AA18) RGMII2_TD1.GPIO0_90 */ /* SODIMM  219 */ /* g_gpio_expansion_2_uart_ck */ /* Physical Address F4170h */
		AM62X_IOPAD(0x01A4, PIN_OUTPUT, 7) /* (B20) MCASP0_ACLKX.GPIO1_11 */ /* SODIMM  30 */ /* g_gpio_junction_box_1_enable_efuse */ /* Physical Address F41A4h */
		AM62X_IOPAD(0x01A0, PIN_OUTPUT, 7) /* (E18) MCASP0_AXR0.GPIO1_10 */ /* SODIMM  34 */ /* g_gpio_junction_box_2_enable_efuse */ /* Physical Address F41A0h */

			
		AM62X_IOPAD(0x0254, PIN_OUTPUT, 7) /* (C20) USB0_DRVVBUS.GPIO1_50 */ /* SODIMM  155 */ /* g_gpio_usb_enable_efuse */ /* Physical Address F4254h */
		AM62X_IOPAD(0x00A8, PIN_OUTPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */ /* SODIMM  220 */ /* g_gpio_usb_reset */ /* Physical Address F40A8h */
		AM62X_IOPAD(0x0128, PIN_OUTPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */ /* SODIMM  187 */ /* g_gpio_reset_rtc_wk */ /* Physical Address F4128h */
		AM62X_IOPAD(0x00AC, PIN_OUTPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */ /* SODIMM  222 */ /* g_gpio_3V3_buck_converter_enable */ /* Physical Address F40ACh */
		
		/* MCU domain pins */
		AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 7) /* (A4) WKUP_UART0_RTSn.MCU_GPIO0_12 */ /* SODIMM  141 */ /* g_gpio_junction_box_1_transceiver_enable */ /* Physical Address 4084030h */
		AM62X_MCU_IOPAD(0x02C, PIN_OUTPUT, 7) /* (C6) WKUP_UART0_CTSn.MCU_GPIO0_11 */ /* SODIMM  143 */ /* g_gpio_junction_box_2_transceiver_enable */ /* Physical Address 408402Ch */
		AM62X_MCU_IOPAD(0x0000, PIN_OUTPUT, 7) /* (E8) MCU_SPI0_CS0.MCU_GPIO0_0 */ /* SODIMM  244 */ /* g_gpio_reset_rtc_sp */ /* Physical Address 4084000h */
		AM62X_MCU_IOPAD(0x0004, PIN_OUTPUT, 7) /* (B8) MCU_SPI0_CS1.MCU_GPIO0_1 */ /* SODIMM  206 */ /* g_gpio_select_adc_mux_1 */ /* Physical Address 4084004h */
		AM62X_MCU_IOPAD(0x0008, PIN_OUTPUT, 7) /* (A7) MCU_SPI0_CLK.MCU_GPIO0_2 */ /* SODIMM  208 */ /* g_gpio_select_adc_mux_2 */ /* Physical Address 4084008h */
	>;
};

};

Any help is appreciated.

Kind regards,
Richard

2

Hi, I’m the Toradex AI Assistant. The Toradex Support team will follow up with you shortly!

Did you like my answer?

:+1: :-1:

Hi Richard,

It looks like you’ve made significant progress in setting up your device tree overlay for the Verdin AM62 module. However, there are a few things you might want to check to ensure that your GPIOs are correctly configured and functional.

  1. Check Pin Multiplexing and Conflicts:

    • Ensure that the pins you are trying to use as GPIOs are not being used by any other peripherals. You can do this by inspecting the base device tree files and making sure that no other nodes are referencing these pins.

  2. Pin Control Node Configuration:

    • Make sure that the pin control node is correctly defined and referenced. For example, you have defined pinctrl_gateway_board_inputs and pinctrl_gateway_board_outputs but ensure that these are correctly referenced in the appropriate nodes.

  3. GPIO Direction and Initial State:

    • Ensure that the GPIO direction is set correctly (input/output) and that the initial state is defined if necessary. For example, you can set the direction and initial state in the device tree overlay.

  4. Check GPIO Export and Permissions:

    • Verify that the GPIOs are exported correctly and that you have the necessary permissions to manipulate them. You can check the /sys/class/gpio directory to see if the GPIOs are exported and accessible.

  5. Debugging with gpio Command:

    • Use the gpio command to debug and manipulate the GPIOs. For example, you can use gpio readall to see the current state of all GPIOs and gpio write to set the state of a specific GPIO.

Here is a simplified example of how you might define and reference GPIOs in your device tree overlay:

&main_pmx0 {
    pinctrl_gpio: gpio_pins {
        pinctrl-single,pins = <
            AM62X_IOPAD(0x00C, PIN_INPUT, 7) /* GPIO0_3 */
            AM62X_IOPAD(0x0010, PIN_INPUT, 7) /* GPIO0_4 */
            // Add other GPIOs here
        >;
    };
};

&main_gpio0 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_gpio>;
    status = "okay";
};

Make sure to replace the AM62X_IOPAD values with the correct ones for your specific pins.

  1. Rebuild and Apply the Overlay:
    • After making the necessary changes, rebuild the device tree overlay and apply it using the TorizonCore Builder Tool. Ensure that the overlay is correctly loaded at boot.

If you have followed these steps and the GPIOs are still not functioning as expected, you might want to check the hardware connections and ensure that there are no issues with the physical pins.

If you need further assistance, please provide more details about the specific errors or issues you are encountering, and I will be happy to help.

Kind regards,
[Your Name]

Please, also check if these links can help you solve your problem:

Pin multiplexing on AM62.

3

if a pin is referenced in another node, how can i disale that then?

4

Hi @RiBe_Act!

You must disable the node. To do this, you can write the node in your device tree with the variable status set to disabled, and this should be enough to make the pin available for other nodes.

Please, refer to this article to understand more about pin multiplexing. There, you can find an example of setting a pin as GPIO.

Best regards.
Lucas Azeituno

5

Hi Lucas,

Sorry for the late reply, i was busy with another project.
I already disabled the node which i think is related to the necessary pins but i still cannot acces the pins as basic gpio’s. If the alternate function (e.g. UART) is disabled do the pins need to be redefined as basic GPIO’s or is this then done automatically?

for reference i uploaded my dts file (i removed the overlay part of the dts and created a new dts source file from a copy of the “k3-am62-verdin-nonwifi-mallow.dts”), i am currently building without an overlay and solely from this dts file (with all the includes).

gateway dts file.txt (5.7 KB)

Kind regards,
Richard

6

Update: after some days of trial and error i fixed the issues.

To whomever faces a smilar issue:
problem description:
i wanted to relocate a several default assigned UART and other peripheral connections and use those default assigned pins as basic GPIO’s.
Also i wanted to remove unnecessary aliases and add new ones.

Module used: Toradex Verdin AM62 512MB non wifi/bt.

In order to achieve this the UARTs have to be disabled or re-assigned.
when disabling a UART completely a “status” property change in the specific UART node to “disabled” is enough to disabled the functionality of the UART.
I also redefined the GPIO’s by adding them to the according “mcu_pmx0” or “main_pmx0” node and by linking the new pin definitions to the matching “main_gpio0” / “main_gpio1” or “mcu_gpio0” nodes.
Also it is necessary to add the newly configured pins to the matching “gpio-line-names” list.

The final version of the device tree source file is given below.
I stopped using an overlay device tree file and copied a base file and added following changes there.

summary of changes:

  • Removed TPM module fom SPI 1 bus
  • Removed onboard EEPROM and Temperature sensor from main_i2c1.
  • Enabled PWM_1 and PWM_2 (were already enabled but addedd for documentation purposes).
  • Disabled SDHC1 >> used these pins as basic GPIO’s
  • Disabled mcu_i2C0 >> used these pins as basic GPIO’s
  • Disabled PCIE_1_reset >> used this pin as basic GPIO’s
  • WKUP UART >> disabling of RTS and CTS.
  • Enabling of mcu_uart0
  • Enabling of main_uart0
  • Enabling of main_uart1
  • Disabling of main_uart0
  • Enabling of main_uart3 (with RTS and CTS)
  • Enabling of main_uart5
  • Disabling of main_uart6
  • Disabling of mcasp0 (was not enabled but added for documentation purposes).
  • Added all new GPIO’s to matching gpio chips ‘gpio-line-names’ list and linked to new pincontrol nodes.
  • Removed aliasses for I2C3 and MMC1
  • Added alias for serial 5 (via bus address).

As a side note: not all these changes have been validated yet but an update with that will come later.

gateway dts file_working.txt (10.7 KB)

7

Hi @RiBe_Act!

I’m glad to know that you were able to solve this issue.
I don’t know if you used it, but as I said before, we have an article about pin multiplexing that could help with this issue.

If you face any other issue or have any doubts, feel free to open another topic.

Best regards.
Lucas Azeituno