Which pin to control the power to my LVDS display

I am trying to design my own baseboard for a Apalis i.Mx6 board.
Most displays want you to sequence the power, lvds signals, and backlight power.
In other designs I have done using X86 processors the modules had three control signals
One for Display Power
One for Backlight Power
One for PWM for Backlight.
Looking at the apalis_evaluation_board_v1.1_schematics I found
BKL1_ON - seem to be the backlight power signal but can not tell if low or high active.
PWM_BKL1 - appears to be the PWM signal.

I can NOT find the Display power signal. So any info on which signal I should use and is it low active or high active.

Thanks
Tom

The BKL1_ON is a GPIO which can be set(active low/high) as per the display requirements, may be you can use the same BLK1_ON signal to control both the display power and back light power control or use any free GPIO signal to control the display power.

The Enable Display power signal needs to go on and off at different times then the backlight enable signal. Most LCD want something like the attached picture.

So not sure where in the UBOOT/Linux stuff the control of the display power is happening.
So yes I can use any GPIO the issue is I have no idea how to get the UBOOT/Linux stuff to use it.

So not sure where in the UBOOT/Linux stuff the control of the display power is happening. So yes I can use any GPIO the issue is I have no idea how to get the UBOOT/Linux stuff to use it.

As such there is no standard way of handling the external display power sequence control in Linux/U-Boot. One can add the power sequence in U-Boot have a look at this for information on accessing GPIOs in U-Boot.