VIL for Apalis iMX8 QuadXPlus 2GB ECC IT

Hi, can anyone advice me on the VIL of I2C SDA and SDA for Apalis iMX8 QuadXPlus 2GB ECC IT? I am using I2C bus 4 (pin 239 SCL, pin 8 SDA). Thanks!

Hi @Jing_Wen , VIL Input Logic Low Threshold (Max) is specified by I2C standard that is 0.3Vdd. Apalis iMX8QXP is 3.3V tolerant. Apalis Design Guide, Chapter 2.14:

The I2C and the DDC interfaces do not feature any pull-up resistors on the module. It is required to
add pull-up resistors to the data and clock lines on the carrier board. The pull-up resistor value is
typically between 1kΩ and 10kΩ. A small pull-up resistor increases power consumption, while a
large resistor could lead to signal quality problems. The optimum size of the resistor depends on
the capacitive load on the I2C lines and the required bus speed.

Ok, noted. Thanks for the reply!