VF61 ADC with multiple channels


I’m working on an application where I need to sample the voltage and current waveforms from one load. The idea is to connect the voltage signal in ADC0 and the current signal in ADC1. Using different ADC’s I can start the sampling process at the very same time (I don’t know if is possible using Linux driver). To improve the accuracy of the system I have other two voltage and current signals. They are only scales of the first ones. So I have two voltage signals on ADC0 and two current signals on ADC1. I would like to sample N points of a waveform at a fixed frequency (10KHz minimum) using the internal ADC of VF61 of each signal and save them in a file to process later.

I’m trying to enable ADC channels with the following statements:

echo 1 > /sys/bus/iio/devices/iio:device0/scan_elements/in_voltage8_en
echo 1 > /sys/bus/iio/devices/iio:device0/scan_elements/in_voltage9_en
echo 1 > /sys/bus/iio/devices/iio:device1/scan_elements/in_voltage8_en
echo 1 > /sys/bus/iio/devices/iio:device1/scan_elements/in_voltage9_en

But only the first line is executed without errors.



@danieloak, within one ADC, the hardware does not allow to select multiple channels at once and sample them simultaneously (or pseudo-simultaneously). Such a functionality would need to be implemented in software. The real-time behavior and “simultaneousness” of two channels would certainly suffer… The current driver does not implement such software support currently ( vf610_adc.c uses iio_validate_scan_mask_onehot to enforce this limitations, which is why you get the “Invalid argument” error return).

Since the driver uses software trigger, the two ADC instances won’t be perfectly synchronized either. Hardware level synchronization might be possible using hardware triggers (e.g. by using PDB, Programmable Delay Block), we currently do not plan to implement this. Also, each of the two ADC instances would still need to switch between the two channels in software…

Therefor, if you can live with worst-case latencies introduced by Linux, you could try to do all that in software using the ADC driver on Linux.

Otherwise, the secondary Cortex-M4 core might be a viable solution to avoid latencies. The firmware on the M4 core would be able to control the two ADC instances in real-time, and would be able to provide the end result to the A5 core through shared memory. This solution involves a bit more complexity, but would allow maximum flexibility when it comes to control the two ADC’s…

Otherwise, a more capable external ADC might be a viable solution too.

@stefan.agner, thanks for the awnser. I has already considerated use the M4 for the real time tasks (that is why I choose VF61) but due to the complexity of using two cpu’s I tried to use only A5.

Again, thanks for the help…