Verdin IMX8MM V1.1A PCIe Clock signal not compliant with PCIe specification


The PCIe Clock output (SODIMM pins 226/228) does not produce a correct output signal on Verdin IMX8MM V1.1A. It was correct on V1.0B.

The amplitude of the signal is <200mV, it should be >800mV (It was >800mV on Verdin 1.0B). The effect of this deviation is that the PCIe devices on the carrier are not always recognized on system boot and/or kernel panics appear.

This is a serious problem. How to fix it?

We tested it on Verdin Development Board and a PCIe Minicard and on our own carrier board with a PERICOM PCIe bridge. In both cases, the amplitude of PCIe clock is too low.

Used BSP: tdxref-oe-prerelease-frankfurt/dunfell-5.x.y/nightly/219/verdin-imx8mm/tdx-xwayland/tdx-reference-minimal-image (Build from 2021-02-15).
Further test with BSP 5.1.0, same result.

Measurements link text

Hello Klausci,

we are looking into that. It seems that the right register settings are not yet in the latest build.
What is the behavior will it work sometimes or fail right away.

Best Regards,

Matthias Gohlke

The behavior is: Most of the time, linux starts up, detects our PCIbridge and the devices behind the bridge. But sometimes the kernel hangs or crashes at PCIe initialization.
Furthermore, we have a PCIe based Ethernet chip behind the bridge, that looses many packets. We suspect the losses are caused by retries on PCIe.
So its ok for a few weeks, but must be fixed in the long term.

Furthermore, we see reduced PCIe performance with a LAN743x. With Verdin 1.1A, it looses many packets on reception, while it is completely ok with Verdin 1.0B

As it looks right now there will be a new version of the SOM with the fix of the PCIe issue.

Best Regards,