Using UART2 for debug with U-Boot Colibri-Imx8x

Technical Support
, , ,
1

I have a Colibri-IMX8X module with a custom carrier board.
I am trying to configure UART2 for debug output instead of UART 3.

I have made the following changes:

diff --git a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
index 84417d0ea6..2abf6b8129 100644
--- a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
+++ b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
@@ -92,7 +92,7 @@
        u-boot,dm-pre-proper;
 };
 
-&pd_dma_lpuart3 {
+&pd_dma_lpuart2 {
        u-boot,dm-pre-proper;
 };
 
@@ -175,7 +175,7 @@
        u-boot,dm-pre-proper;
 };
 
-&lpuart3 {
+&lpuart2 {
        u-boot,dm-pre-proper;
 };


iff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts
index a672347e1a..7ee5208803 100644
--- a/arch/arm/dts/fsl-imx8qxp-colibri.dts
+++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts
@@ -12,8 +12,8 @@
        compatible = "toradex,colibri-imx8x", "fsl,imx8qxp";
 
        chosen {
-               bootargs = "console=ttyLP3,115200 earlycon=lpuart32,0x5a090000,115200";
-               stdout-path = &lpuart3;
+               bootargs = "console=ttyLP2,115200 earlycon=lpuart32,0x5a080000,115200";
+               stdout-path = &lpuart2;
        };
 
        reg_usbh_vbus: regulator-usbh-vbus {
@@ -57,6 +57,13 @@
                        >;
                };
 
+        pinctrl_lpuart2: lpuart2grp {
+            fsl,pins = <
+                SC_P_UART2_RX_ADMA_UART2_RX                    0X06000020
+                SC_P_UART2_TX_ADMA_UART2_TX                    0X06000020
+            >;
+        };
+
                pinctrl_fec1: fec1grp {
                        fsl,pins = <
                                SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD      0x000014a0 /* Use pads in 3.3V mode */
@@ -88,10 +95,10 @@
 
                pinctrl_hog1: hog1grp {
                        fsl,pins = <
-                               SC_P_QSPI0A_DATA1_LSIO_GPIO3_IO10       0x00000020 /*  45 */
+                               SC_P_QSPI0A_DATA1_LSIO_GPIO3_IO10       0x02000020 /*  45 */
                                SC_P_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02   0x06000020 /*  65 */
                                        SC_P_CSI_D07_CI_PI_D09          0x00000061
-                               SC_P_QSPI0A_DATA2_LSIO_GPIO3_IO11       0x00000020 /*  69 */
+                               SC_P_QSPI0A_DATA2_LSIO_GPIO3_IO11       0x02000020 /*  69 */
                                SC_P_QSPI0A_DQS_LSIO_GPIO3_IO13         0x00000020 /*  73 */
                                SC_P_SAI0_TXC_LSIO_GPIO0_IO26           0x00000020 /*  79 */
                                        SC_P_CSI_D02_CI_PI_D04          0x00000061
@@ -112,7 +119,7 @@
                                SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04        0x00000020 /* 133 */
                                SC_P_CSI_PCLK_LSIO_GPIO3_IO00           0x00000020 /*  96 */
                                SC_P_QSPI0B_DATA3_LSIO_GPIO3_IO21       0x00000020 /*  98 */
-                               SC_P_SAI1_RXFS_LSIO_GPIO0_IO31          0x00000020 /* 100 */
+                               SC_P_SAI1_RXFS_LSIO_GPIO0_IO31          0x02000020 /* 100 */
                                SC_P_QSPI0B_DQS_LSIO_GPIO3_IO22         0x00000020 /* 102 */
                                SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23       0x00000020 /* 104 */
                                SC_P_QSPI0B_SS1_B_LSIO_GPIO3_IO24       0x00000020 /* 106 */
@@ -267,6 +274,12 @@
 &lpuart3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
+       status = "disabled";
+};
+
+&lpuart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpuart2>;
        status = "okay";
 };


diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
index 36bc85fdf0..7cf06771b2 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -32,16 +32,14 @@ static struct gpio_desc gpio_usb_cdet;
                         (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
                         (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
-static iomux_cfg_t uart3_pads[] = {
-       SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
-       SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
-       /* Transceiver FORCEOFF# signal, mux to use pull-up */
-       SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
+static iomux_cfg_t uart2_pads[] = {
+       SC_P_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+       SC_P_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
 
 static void setup_iomux_uart(void)
 {
-       imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
+       imx8_iomux_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
 }


diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h
index 0f4e415678..c30547d7dc 100644
--- a/include/configs/colibri-imx8x.h
+++ b/include/configs/colibri-imx8x.h

 /* Enable Distro Boot */
 #define BOOT_TARGET_DEVICES(func) \
@@ -41,12 +41,13 @@
        M4_BOOT_ENV \
        MEM_LAYOUT_ENV_SETTINGS \
        "boot_script_dhcp=boot.scr\0" \
-       "console=ttyLP3\0" \
+       "console=ttyLP2\0" \
        "fdt_board=eval-v3\0" \

When I create an image with these patches u-boot seems to crash.

I am using the following BSP to build my image:

<remote name="toradex"
          fetch="git://git.toradex.com"/>
  <project name="meta-toradex-bsp-common"
           remote="toradex"
           revision="a1a81391a926d64010447d0e1b7700947b682393"
           upstream="kirkstone-6.x.y"
           path="layers/meta-toradex-bsp-common"/>
  <project name="meta-toradex-nxp"
           remote="toradex"
           revision="c997bae3e7e21380d2ad11919a6dd1762bd3fbba"
           upstream="kirkstone-6.x.y"
           path="layers/meta-toradex-nxp"/>

Are my changes correct and are there additional changes I need to switch the UART ?

2

Hey @nmohan86,

There may be some more substantial roadblocks for modifying the UART debug port than device tree modifications. (specifically for IMX8 SoMs)

Can I ask is this design change necessary?

-Eric

3

We are using the 24 bit display hence we need SODIMM_25 and SODIMM_26 to be configured for that. These pins are part of lpuart3 which we disabled for the display.

Any documents you can refer me to do change the UART ?

4

The default debug UART on the Colibri iMX8X module utilizes only two pins - SODIMM_33 and SODIMM_35. Therefore, if you intend to use SODIMM_25 and SODIMM_26, there is no need to alter the default UART debug settings.

5

Would I simply make this change in the dtsi to use UART_A and not assign SODIMM_25 and SODIMM_26 for lpuarr3 ?

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index 3fedd825cb3b..6d4b9addfd8f 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
 &lpuart3 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>;
+       pinctrl-0 = <&pinctrl_lpuart3>
 };
6

Hey @nmohan86,

Looking at the datasheet for the IMX8X Colibri, the 24-bit RBG LCD display shows it using X1 pin 25 and X1 pin 27. So I think this is what you mean when you say 25 and 26? The functions assigned to this are UART_A CTS and UART_A_RTS.

So as Alex stated, you shouldn’t need to disable UART pins.