After fiddling with the DTS I am afraid I damaged one of our Colibri iMX6 modules. The module does not boot via TFTP/NFS any more due to error frame: 0x2df4fd40 0x00000804-errors. Before I continue damaging our remaining modules, can you please check if I am doing the right thing:
I know I can configure and use a GPIO as input from userpace like this:
echo ${gpio} > /sys/class/gpio/export
echo "in" > /sys/class/gpio/gpio${gpio}/direction
cat /sys/class/gpio/gpio${gpio}/value
This works for SODIMM 69 with ball name SD2_CMD used as GPIO1_IO11 by replacing ${gpio} with 11:
/sys/class/gpio/gpio${gpio}/value switches between 0 and 1 according to the applied input signal.
However it doesn’t work for SODIMM 67 with ball name GPIO01 or EIM_ADDR21 neither used as GPIO1_IO01 (gpio=1) nor used as GPIO2_IO17 (gpio=49): /sys/class/gpio/gpio${gpio}/value stays 0 no matter what input signal is applied.
I tried to make GPIO1_IO01 available in our DTS which is essentially a copy of imx6dl-colibri-eval-v3.dts within the iomuxc block like this:
@@ -199,11 +199,12 @@
&pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
&pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
&pinctrl_csi_gpio_1
&pinctrl_gpio_1
&pinctrl_gpio_2
- &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>;
+ &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
+ &pinctrl_din>;
gpio {
pinctrl_pcap_1: pcap-1 {
fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 PAD_CTRL_HYS_PD /* SODIMM 28 */
@@ -221,10 +222,18 @@
pinctrl_reset: reset {
fsl,pins = <
MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 PAD_CTRL_HYS_PD/* SODIMM 187 */
>;
};
+
+ pinctrl_din: din {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_1__GPIO1_IO01
+ (/* Enable SION */ (1<<30) | PAD_CTRL_HYS_PD) /* SODIMM 67 */
+
+ >;
+ };
};
};
&lcd {
status = "okay";
This works after I exchanged the module I probably damaged with my first trial and error approaches.
With the first module I also tried fsl,pins = <MX6QDL_PAD_GPIO_1__GPIO1_IO01 ((1<<30) | PAD_CTRL_HYS_PU)>; (note the …_PU instead of …_PD) which did not work. I don’t know if it didn’t work because I already damaged it, or if this caused the damage.
In Colibri iMX6 Datasheet I read:
Some of the i.MX6 pins are paired and
share the same SODIMM pin. When using
one of these pins, make sure that the
unused pin the pair is tri-stated or
configurator as input to avoid
undesired behaviour and/or hardware
damage.
Is it necessary (and sufficient) to add this line:
@@ -227,11 +277,11 @@
pinctrl_din: din {
fsl,pins = <
MX6QDL_PAD_GPIO_1__GPIO1_IO01
(/* Enable SION */ (1<<30) | PAD_CTRL_HYS_PD) /* SODIMM 67 */
-
+ MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16 PAD_CTRL_IN /* disabled camera pins */
>;
};
};
};
The pins are already configured in other pingroups. In How to unhog pin in the device tree I read:
Unfortunately there is no way to
delete/mask single pins within a
pingroup.However, you can overwrite properties.
In your case you would need to add
&iomuxc and set pinctrl-0 = to all but
pinctrl_hog_1. Then create a new
pinctrl_hog_1 without the two pins ,
and add it as well.
Does it mean I have to add another &iomuxc block in front of the actual &iomuxc block? Like this:
@@ -201,10 +201,60 @@
&pinctrl_csi_gpio_1
&pinctrl_gpio_1
&pinctrl_gpio_2
&pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
&pinctrl_din>;
+ pwm {
+ pinctrl_pwm2: pwm2grp {
+ fsl,pins = <
+ >;
+ };
+ };
+
+
+ ipu1 {
+ pinctrl_ipu1_csi0: ipu1grp-csi0 { /* parallel camera */
+ fsl,pins = <
+ MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0xb0b1
+ MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13 0xb0b1
+ MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14 0xb0b1
+ MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15 0xb0b1
+ MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17 0xb0b1
+ MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18 0xb0b1
+ MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19 0xb0b1
+ MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK 0xb0b1
+ MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0xb0b1
+ MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0xb0b1
+
+ MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40 /* disabled PWM pins on camera IF */
+ >;
+ };
+ };
+
+ imx6dl-colibri {
+ pinctrl_pwm_d_cif_d6: pwm_d_cif_d6 {
+ fsl,pins = <
+ >;
+ };
+ };
+};
+
+&iomuxc {
+ /*
+ * Mux all pins which are unused to be GPIOs
+ * so they are ready for export to user space
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
+ &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
+ &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
+ &pinctrl_csi_gpio_1
+ &pinctrl_gpio_1
+ &pinctrl_gpio_2
+ &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
+ &pinctrl_pwm2 &pinctrl_ipu1_csi0 &pinctrl_pwm_d_cif_d6
+ &pinctrl_din>;
gpio {
pinctrl_pcap_1: pcap-1 {
fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 PAD_CTRL_HYS_PD /* SODIMM 28 */