UART5 RTS can't work on DTE mode on Colibri i.MX6 for rs485

Technical Support
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1

I use UART5 for RS485 communication, the device (Colibri i.mx6) can receive data but send fail. Here is my modified in device tree:
arch/arm/boot/dts/imx6qdl-colibri.dtsi

uart5 {
        pinctrl_uart5_dte: uart5grp-dte { /* DTE mode */
                fsl,pins = <
                    MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA        0x1b0b1
                    MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA        0x1b0b1
                    MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B  0x1b0b1
                    MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B  0x1b0b1         
                >;
        };
};

/* UART_E */
&uart5 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart5_dte>;
        fsl,dte-mode;
        status = "disabled";
};

arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtb

&uart5 {
        status = "okay";
#if 1
        linux,rs485-enabled-at-boot-time;
#endif
};

I found the RTS pin (CSI0_DAT18) always in high, it means it can receive data but can’t send anything.
Any ideas what could be wrong here?

2

May I know which Linux Image version is flashed on the module ?

The default UART active state being logic low the RTS will be low during data tx. To control the RS485 transceiver DE pin with the UART default logic one need to have a inverted logic in h/w, have a look at the Colibri Evaluation board schematics. If to have inverted logic in s/w one will need to configure the UART port accordingly via IOCTLs. Have a look at serial-rs485 documentation.

3

The Linux Image Version is Colibri_iMX6_LinuxImageV2.6. I get the Linux kernel branch toradex_imx_3.14.52_1.1.0_ga from build-u-boot-and-linux-kernel-from-source-code and rebuild it. The UART5(UARTE) isn’t be configured in device tree in default and It need to be configured as above.

I try to configure the UART port by IOCTLs but it still can’t send data.
If I set the RTS pin (CSI0_DAT18) low by configuring it to be output pin, the RS485 port can send data normally. I don’t it any wrong in the pin configuration:

             MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B  0x1b0b1
             MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B  0x1b0b1
4

you may delet following in imx6qdl-colibri.dtsi as this pin is also configured as external memory bus.
MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0

5

Hi

If you use the UART in DTE mode, then you have RTS (output) on CSI0_DAT19 and CTS (input) on CSI0_DAT18.

 uart5 {
         pinctrl_uart5_dte: uart5grp-dte { /* DTE mode */
                 fsl,pins = <
                     MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA        0x1b0b1
                     MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA        0x1b0b1
                     MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B  0x1b0b1
                     MX6QDL_PAD_CSI0_DAT19__UART5_RTS_B  0x1b0b1         
                 >;
         };
 };

Max

6

Yes, I have deleted MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0 in the imx5qdl-colibri.dtsi

7

**Thanks for your suggest. I try to change the pin definition you mentioned above in the device tree and change the pin CSI0_DAT19 to be RTS (output) in my h/w. But the problem still exists. **

8

with this configuration, you can test ‘MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B’ a.k.a SODIMM_177 when sending data, it will be low during sending.

9

Thank all, I add fsl,uart-has-rtscts; , and it work now.