can I use UART_D ALT2 (pins 157/169) and UART_E ALT2 (pins 27/23) on iMX7D SOM?
my carrier board which is currently under test already has these 2 ports connected to RS-232 transceivers. My developer is saying that he cannot use them because UART_E function is not available and UART_D function is used for NAND.
please help - do i need to re-spin the board or ??
I looked into the device tree source code to see how exactly we use these pins and here’s what I found out:
- SODIMM 23: Used as the UART DTR signal for UART 1/A, if you don’t need this signal I don’t see why you can’t just remove it from the UART1 interface and free it up for your uses
- SODIMM 27: Used as the UART RTS signal for UART 1/A, sames as above if you don’t need this just free the pin and use it
- SODIMM 157: This one is tricky it’s used as the “NAND_CE0_B” signal for the gpmi nand controller. I don’t see another pin we can use as a substitute here so this might not be possible.
- SODIMM 169: This pin isn’t being used by anything far as I can tell it’s just being used as a GPIO.
Given that it only seems like pin 157 might be problematic to use. Though there may be some workaround that I’m not aware of here. Other than that I’m not quite sure what your developer means by “UART_E function is not available”, this alternate function should be supported by the respective pins. If it’s not working correctly that’s another matter and should be reported to us if you notice it.
that’s bad news for me as now I have to redo my schematics and board - my board designer assumed that since the spec showed we can use these as ALT functions then they were available which makes sense. How were we to know that you are using UART_D for NAND. Its confusing and in the table you could have mentioned which ALT functions are not available and which ones are the standard ones used.
Alright so I did a quick test. I disabled the GPMI nand controller that was using pin 157 and did some tests. As far as I can tell the system still boots and I’m able to use pin 157, I used it as a GPIO but I assume you can use it for UART once freed up. So that being said I think you’re safe to use all 4 pins.
Though let me know if you have further issues with use of any of those pins.
@jeremias.tx - but does this disable my eMMC 4GB memory ?’
Else what is the ramifications of doing this?
@jeremias.tx any update on this please
I haven’t noticed any issues so far with my modification. It seems the GPMI nand controller is more important for “raw NAND” uses cases. But since you’re using the 1GB variant which uses eMMC and not raw NAND you shouldn’t be majorly affected as far as I can tell.
Normally we just keep the GPMI controller enabled for all variants of the i.MX7 just to be safe that it’s not disabled for the “raw NAND” variants.
So in short if you’re using the 1GB variant with eMMC flash you should be safe. Though do mention if you encounter any unforeseen side effects.