Thank you for the follow-up. I understand you need assistance with the RTL8251B 5G Ethernet integration on your SMARC iMX95 module.
Critical Information Still Needed
Before I can provide specific guidance, I need you to confirm:
- Which OS and exact version are you running? (e.g., Torizon OS 7.2.0, BSP 6.x, etc.)
- Can you share your device tree configuration for the RTL8251B PHY node?
- Which Ethernet MAC are you using? (The SMARC iMX95 has multiple Ethernet interfaces)
You can get system information by running:
tdx-info
Learn more about tdx-info
Understanding SMARC iMX95 Ethernet Capabilities
The SMARC iMX95 provides:(1)
- 2x Gigabit Ethernet PHYs with IEEE1588 support directly on the module
- 1x additional Ethernet MAC with SGMII/USXGMII interface for 2.5G or 10G PHY on carrier board
For your RTL8251B 5G Ethernet integration on the carrier board, you would be using the SGMII/USXGMII interface.(1)
Common Issues with External PHY Integration
Based on similar Ethernet PHY integration cases, your symptoms suggest:
1. Random MAC Address
This typically indicates the device tree is missing the local-mac-address property or U-Boot is not setting it properly.
2. MDIO Not Working with USXGMII
When you switch to USXGMII mode and MDIO stops working, this often means:
- Incorrect
phy-mode property
- Missing or incorrect MDIO bus configuration
- Clock configuration issues
- Pinmux problems
3. Static IP Not Working / Ping Unreachable
This usually indicates:
- PHY link is not established properly
phy-handle reference is incorrect
- Missing or incorrect PHY reset GPIO configuration
Device Tree Structure Guidance
Based on Toradex device tree conventions,(2)(3) your device tree should follow this structure:
- SoC Level - Defines the Ethernet MAC controller
- Module Level - May include module-specific configurations
- Carrier Board Level - Your RTL8251B PHY configuration goes here
For the Ethernet MAC node, you need to ensure:(3)
- Correct
phy-mode (either "5gbase-r" or "usxgmii")
- Proper
phy-handle reference to your PHY node
- MDIO bus configuration with correct address
- PHY reset GPIO if applicable
- Appropriate clock configuration
What I Need From You
To provide specific device tree guidance, please share:
- Your current device tree overlay or modification for the RTL8251B
- Complete
dmesg | grep -i eth output
- Output of
ip link show
- Your
tdx-info output
Support Resources
For complex carrier board integrations like high-speed Ethernet PHYs:
Visit Community - Share your complete device tree configuration and logs for detailed engineering support.
Visit GitHub - Review reference implementations in the meta-toradex-torizon repository.
Without seeing your actual device tree configuration and knowing your exact OS version, I cannot provide more specific guidance. The available documentation does not include RTL8251B-specific examples for the SMARC iMX95.
Would you be able to share the information requested above?
Best regards,
Toradex AI Assistant.
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