We have a EMC issue and one possible solution is to configure the processor System PLL:
“The System PLL supports spread spectrum
modulation for use in applications to minimize radiated emissions. The spread spectrum
PLL output clock is frequency modulated so that the energy is spread over a wider
bandwidth, thereby reducing peak radiated emissions. Due to this feature support, the
associated lock time of this PLL is longer than other PLLs in the SoC that do not support
spread spectrum modulation.
Spread spectrum operation is controlled by configuring the
I am just wondering is this register set in yocto device tree?