Toradex Colibri VF50 : bytes missing using RS485

Hi support,
We have build a small gateway with a Toradex Colibri VF50 to read electric meters.
The interface to the meters is RS485 and the protocol is DLMS (a HDLC based protocol).
The Colibri VF50 has a linux 4.1.15 kernel.
For my tests, I use also a second gateway of an older generation with an Atmel ARM9 SoC and a “Monitor” application that just record what it see on the RS485 bus.
The 3 objects (the meter and both gateways) are connected to the same RS485 bus.
In first test, I read the meter with the VF50 and I monitor with the Atmel gateway.
Sometimes, I don’t receive the first bytes of a HDLC frame in my application (1 – 3 first bytes, typically 2 bytes). This happen in ~ 10% of the frames.
The monitor gateway see all the bytes.
For the second test, I swap both applications : Meter application on the Atmel gateway and monitor application on the VF50.
In this case, I receive all the bytes in the meter application, and I have sometimes 2 flags (the first byte of the HDLC frame) at the beginning of a HDLC frame on the VF50 (monitor).
As always I would really appreciate the help.
Kind regards,

Which ttyLPX port is used in your application ?

What is the baud rate configured ?

Did you observe any overruns happening(check by reading ‘/proc/tty/driver/fsl-lpuart’ file) ?

The answers are…:

  • ttyLP2
  • 2400 baud
  • I didn’t check if overruns happening. I will do it.

I have the same effect with a kernel 4.4.21.
I don’t see any overrun :

cat fsl-lpuart
serinfo:1.0 driver revision:
0: uart:FSL_LPUART mmio:0x40027000 irq:19 tx:6301 rx:0 RTS|DTR
1: uart:FSL_LPUART mmio:0x40028000 irq:20 tx:0 rx:0
2: uart:FSL_LPUART mmio:0x40029000 irq:21 tx:830 rx:1735 RTS|DTR
3: uart:FSL_LPUART mmio:0x4002A000 irq:22 tx:0 rx:0

I will try to build a simple test code that reproduce the problem.

Do you use the device tree method or TIOCSRS485 to enable RS485? There is also SER_RS485_RTS_ON_SEND/SER_RS485_RTS_AFTER_SEND, is the RTS signal doing what you expect?

Here is the corresponding code :

memset(&rs485conf, 0, sizeof(struct serial_rs485));
rs485conf.flags = SER_RS485_ENABLED | SER_RS485_RTS_AFTER_SEND;
status = ioctl(fdSerial, TIOCSRS485, &rs485conf);

The RTS signal is doing what I expect : as in the datasheet, the RTS signal goes from low to high one bit period before the first (start) bit, and goes from high to low a bit period after the (stop) bit.

I didn’t find a possible issue to happen at least with the said settings. May be it will be helpful if you can provide a test case where we can reproduce this issue so that we can get some hints to check that.

Was there ever a resolution for this? Our application uses an RS-485 based protocol and about 10% of the time at startup, the VF50 is dropping bytes. This causes packet CRC failures and as a result, the device fails to join the network.

We are using ttyLP2 at 38400. Yes, we see both FE and OE when the board gets in this state. unfortunately, it requires a hard boot to get it out of this state and that doesn’t always work (i.e. the failure state occurs across simultaneous boots).

The use of TIOCSRS485 seems to not have any effect, and in fact it’s been stated that the delay members of this structure are ignored.

hi, which bsp are you using? can you provide an example code/setup, so we can reproduce this issue?