TK1 SDIO 3.3V only

Technical Support
, ,
1

I have an Apalis TK1 running Angstrom Linux on the evaluation board and have successfully integrated the Laird ST60 WiFi module on its development board such that the TK1 detects the ST60 and allows me to configure the wifi network using the SDIO (mmc1) port on the eval board. This is accomplished by configuring the ST60 to use the 1.8V host configuration. Wit the ST60 board configuraed for a 3.3V host, I get an error -22.

My problem is I need to only use the 3.3V host configuration for a custom board design. What is the best way to configure the PMIC LDO1 to only use the 3.3V and not automatically switch to the 1.8V. From the TK1 datasheet, it says the voltages are changed by setting the according LDO output voltage register of the PMIC.

I tried modifying the tegra124-apalis-pmic.dtsi to set the min-microvolt to 3300000 but I get an error -22 :

			as3722_ldo1: ldo1 {
				regulator-name = "VDDIO_SDMMC1";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;

				consumers {
					c1 {
						regulator-consumer-supply = "vddio_sdmmc";
						regulator-consumer-device = "sdhci-tegra.0";
					};
					c2 {
						regulator-consumer-supply = "pwrdet_sdmmc1";
					};
				};
			};
2

HI @rbammons

Thanks for writing to the Toradex Community!

Could you provide the version of the hardware (including carrier board) and software of your module?
Please share the dmesg.log in a text format?

Thanks and best regards,
Jaski

3

Jaski,

We are using the following:

  • Apalis TK1 V1.2A
  • Apalis Evaluation Board V1.1A
  • Laird ST60 SIPT Wireless Chip
  • Laird ST60 SIPT Development Kit (DVK)
  • Angstrom Linux version 3.10.40-2.8.6+g2c7a3c3
  • Laird ST60 Drivers 7.0.0.242
  • dmesg.txt attached - link text

I modify the device tree (tegra-soc.dtsi) and added ‘no-1-8-v’ to the SDIO for this particular dmesg boot. The ST60 is plugged into the SD/MMC 4-Bit port

Thank you for any help you can provide

tegra124-soc.dtsi:
sdhci@700b0600 {
	compatible = "nvidia,tegra124-sdhci";
	reg = <0x0 0x700b0600 0x0 0x200>;
	interrupts = < 0 31 0x04 >;
	nvidia,memory-clients = <28>;
	no-1-8-v;
	status = "disabled";
};
sdhci@700b0400 {
	compatible = "nvidia,tegra124-sdhci";
	reg = <0x0 0x700b0400 0x0 0x200>;
	interrupts = < 0 19 0x04 >;
	nvidia,memory-clients = <27>;
	no-1-8-v;
	status = "disabled";
};
sdhci@700b0200 {
	compatible = "nvidia,tegra124-sdhci";
	reg = <0x0 0x700b0200 0x0 0x200>;
	interrupts = < 0 15 0x04 >;
	nvidia,memory-clients = <26>;
	no-1-8-v;
	status = "disabled";
};
sdhci@700b0000 {
	compatible = "nvidia,tegra124-sdhci";
	reg = <0x0 0x700b0000 0x0 0x200>;
	interrupts = < 0 14 0x04 >;
	nvidia,memory-clients = <25>;
	no-1-8-v;
	status = "disabled";
4 
	sdhci@700b0600 {
		compatible = "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0600 0x0 0x200>;
		interrupts = < 0 31 0x04 >;
		nvidia,memory-clients = <28>;
		no-1-8-v;
		status = "disabled";
	};
	sdhci@700b0400 {
		compatible = "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0400 0x0 0x200>;
		interrupts = < 0 19 0x04 >;
		nvidia,memory-clients = <27>;
		no-1-8-v;
		status = "disabled";
	};
	sdhci@700b0200 {
		compatible = "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0200 0x0 0x200>;
		interrupts = < 0 15 0x04 >;
		nvidia,memory-clients = <26>;
		no-1-8-v;
		status = "disabled";
	};
	sdhci@700b0000 {
		compatible = "nvidia,tegra124-sdhci";
		reg = <0x0 0x700b0000 0x0 0x200>;
		interrupts = < 0 14 0x04 >;
		nvidia,memory-clients = <25>;
		no-1-8-v;
		status = "disabled";
5

If I am not mistaken, this NVIDIA downstream L4T does not make use of the device tree for the SDHCI configuration but this is rather still configured via board platform data here:

http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/mach-tegra/board-apalis-tk1-sdhci.c?h=toradex_tk1_l4t_r21.7#n105

Actually, looking at the above I can’t seem to find any way to influence what you are looking for. But the PMIC configuration including the voltage rail for the SD slots VDD-IO can be found in the device tree and to limit the SDHCI signalling voltage to 3.3 volt only one just has to change resp. regulator-min-microvolt from 1800000 to 3300000:

http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-pmic.dtsi?h=toradex_tk1_l4t_r21.7#n337

http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-pmic.dtsi?h=toradex_tk1_l4t_r21.7#n451

As follows the log of using SD cards first with defaults and then with 3.3 volt only signalling:

[   27.076455] mmc1: host does not support reading read-only switch. assuming write-enable.
[   27.111199] sdhci-tegra sdhci-tegra.0: Found T2T coeffs data
[   27.118175] sdhci-tegra sdhci-tegra.0: 200MHz tap hole coeffs found
[   27.803852] **********Auto tuning windows*************
[   27.809715] WIN_ATTR legend: 0-BOUN_ST, 1-BOUN_END, 2-HOLE
[   27.815685] win[0]: 0(0) - 49(1)
[   27.819536] win[1]: 77(0) - 135(1)
[   27.823364] win[2]: 162(0) - 220(1)
[   27.827517] win[3]: 247(0) - 255(1)
[   27.831486] ***************************************
[   27.836866] ********tuning windows after inserting holes*****
[   27.843040] WIN_ATTR legend: 0-BOUN_ST, 1-BOUN_END, 2-HOLE
[   27.848974] win[0]:-8(0) - 33(2)
[   27.852608] win[1]:35(2) - 49(1)
[   27.856301] win[2]:77(0) - 118(2)
[   27.859969] win[3]:120(2) - 135(1)
[   27.863727] win[4]:162(0) - 203(2)
[   27.867451] win[5]:205(2) - 220(1)
[   27.871186] win[6]:247(0) - 255(1)
[   27.875081] ***********************************************
[   27.880978] **********Tuning values*********
[   27.885683] **estimated values**
[   27.889241] T2T_Vmax 59, T2T_Vmin 81, 1'st_hole_Vmax 33, UI_Vmax 84
[   27.895836] **Calculated values**
[   27.899432] T2T_Vmax 58, 1'st_hole_Vmax 34, UI_Vmax 85
[   27.904846] T2T_Vmin 58, 1'st_hole_Vmin 34, UI_Vmin 86
[   27.910295] ***********************************
[   27.915283] ***********final tuning windows**********
[   27.920643] win[0]: 9 - 25
[   27.923635] win[1]: 44 - 32
[   27.926869] win[2]: 94 - 105
[   27.930096] win[3]: 135 - 118
[   27.933432] win[4]: 179 - 185
[   27.936690] win[5]: 226 - 203
[   27.939952] win[6]: 255 - 238
[   27.943267] ********************************
[   27.947835] best tap win - (9-25), best tap value 17 prev_best_tap 30
[   28.635315] **********Auto tuning windows*************
[   28.641264] WIN_ATTR legend: 0-BOUN_ST, 1-BOUN_END, 2-HOLE
[   28.647372] win[0]: 0(0) - 49(1)
[   28.651028] win[1]: 77(0) - 135(1)
[   28.654684] win[2]: 162(0) - 220(1)
[   28.658442] win[3]: 247(0) - 255(1)
[   28.662497] ***************************************
[   28.667731] ********tuning windows after inserting holes*****
[   28.673897] WIN_ATTR legend: 0-BOUN_ST, 1-BOUN_END, 2-HOLE
[   28.679397] win[0]:-8(0) - 33(2)
[   28.683194] win[1]:35(2) - 49(1)
[   28.686487] win[2]:77(0) - 118(2)
[   28.689810] win[3]:120(2) - 135(1)
[   28.693991] win[4]:162(0) - 203(2)
[   28.697435] win[5]:205(2) - 220(1)
[   28.700870] win[6]:247(0) - 255(1)
[   28.704313] ***********************************************
[   28.709921] **********Tuning values*********
[   28.714192] **estimated values**
[   28.717426] T2T_Vmax 59, T2T_Vmin 81, 1'st_hole_Vmax 33, UI_Vmax 84
[   28.723697] **Calculated values**
[   28.727046] T2T_Vmax 58, 1'st_hole_Vmax 34, UI_Vmax 85
[   28.732188] T2T_Vmin 58, 1'st_hole_Vmin 34, UI_Vmin 86
[   28.737330] ***********************************
[   28.741868] ***********final tuning windows**********
[   28.746924] win[0]: 9 - 25
[   28.749650] win[1]: 44 - 32
[   28.752451] win[2]: 94 - 105
[   28.755338] win[3]: 135 - 118
[   28.758312] win[4]: 179 - 185
[   28.761283] win[5]: 226 - 203
[   28.764256] win[6]: 255 - 238
[   28.767228] ********************************
[   28.771519] best tap win - (9-25), best tap value 17 prev_best_tap 17
[   28.777970] sdhci-tegra sdhci-tegra.0: sdhci_tegra_verify_best_tap: tuning freq 200000000hz, best tap 17
[   28.791469] mmc1: new ultra high speed SDR104 SDHC card at address aaaa
[   28.798267] mmcblk mmc1:aaaa: Card claimed for testing.
[   28.803736] mmcblk2: mmc1:aaaa SC16G 14.8 GiB
[   28.813289]  mmcblk2: p1

root@apalis-tk1:~# cat /sys/kernel/debug/mmc1/ios
clock:          208000000 Hz
actual clock:   200000000 Hz
vdd:            17 (2.9 ~ 3.0 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    6 (sd uhs SDR104)
signal voltage: 0 (1.80 V)

root@apalis-tk1:~# hdparm -t /dev/mmcblk2

/dev/mmcblk2:
 Timing buffered disk reads: 210 MB in  3.01 seconds =  69.80 MB/sec


[   23.170613] mmc2: host does not support reading read-only switch. assuming write-enable.
[   23.194050] sdhci-tegra sdhci-tegra.2: Found T2T coeffs data
[   23.201016] sdhci-tegra sdhci-tegra.2: 81MHz tap hole coeffs found
[   23.754735] **********Auto tuning windows*************
[   23.761121] WIN_ATTR legend: 0-BOUN_ST, 1-BOUN_END, 2-HOLE
[   23.767110] win[0]: 0(0) - 117(1)
[   23.770622] win[1]: 133(0) - 255(1)
[   23.775004] ***************************************
[   23.780101] ********tuning windows after inserting holes*****
[   23.785968] WIN_ATTR legend: 0-BOUN_ST, 1-BOUN_END, 2-HOLE
[   23.791527] win[0]:-79(0) - 117(1)
[   23.795024] win[1]:133(0) - 135(2)
[   23.798471] win[2]:137(2) - 255(1)
[   23.801917] ***********************************************
[   23.807515] **********Tuning values*********
[   23.811824] **estimated values**
[   23.815101] T2T_Vmax 58, T2T_Vmin 81, 1'st_hole_Vmax 136, UI_Vmax 212
[   23.821575] **Calculated values**
[   23.824914] T2T_Vmax 58, 1'st_hole_Vmax 136, UI_Vmax 212
[   23.830256] T2T_Vmin 90, 1'st_hole_Vmin 81, UI_Vmin 137
[   23.835515] ***********************************
[   23.840075] ***********final tuning windows**********
[   23.845146] win[0]: -39 - 64
[   23.848051] win[1]: 150 - 71
[   23.850955] win[2]: 153 - 153
[   23.853952] ********************************
[   23.858257] best tap win - (-39-64), best tap value 13 prev_best_tap 30
[   23.864892] sdhci-tegra sdhci-tegra.2: sdhci_tegra_verify_best_tap: tuning freq 81600000hz, best tap 13
[   23.876564] mmc2: new ultra high speed SDR50 SDHC card at address 1234
[   23.884450] mmcblk mmc2:1234: Card claimed for testing.
[   23.890223] mmcblk1: mmc2:1234 SA08G 7.42 GiB
[   23.896843]  mmcblk1: p1

root@apalis-tk1:~# cat /sys/kernel/debug/mmc2/ios
clock:          100000000 Hz
actual clock:   81600000 Hz
vdd:            17 (2.9 ~ 3.0 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    5 (sd uhs SDR50)
signal voltage: 0 (1.80 V)

root@apalis-tk1:~# hdparm -t /dev/mmcblk1

/dev/mmcblk1:
 Timing buffered disk reads:  98 MB in  3.00 seconds =  32.61 MB/sec


[  393.876793] mmc1: host does not support reading read-only switch. assuming write-enable.
[  393.911310] mmc1: new high speed SDHC card at address aaaa
[  393.921877] mmcblk mmc1:aaaa: Card claimed for testing.
[  393.933781] mmcblk2: mmc1:aaaa SC16G 14.8 GiB 
[  393.945466]  mmcblk2: p1

root@apalis-tk1:~# cat /sys/kernel/debug/mmc1/ios 
clock:          50000000 Hz
actual clock:   50000000 Hz
vdd:            17 (2.9 ~ 3.0 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    2 (sd high-speed)
signal voltage: 0 (3.30 V)

root@apalis-tk1:~# hdparm -t /dev/mmcblk2

/dev/mmcblk2:
 Timing buffered disk reads:  64 MB in  3.01 seconds =  21.26 MB/sec


[  390.713684] mmc2: host does not support reading read-only switch. assuming write-enable.
[  390.743182] mmc2: new high speed SDHC card at address 1234
[  390.754068] mmcblk mmc2:1234: Card claimed for testing.
[  390.765911] mmcblk1: mmc2:1234 SA08G 7.42 GiB 
[  390.773833]  mmcblk1: p1

root@apalis-tk1:~# cat /sys/kernel/debug/mmc2/ios
clock:          50000000 Hz
actual clock:   50000000 Hz
vdd:            17 (2.9 ~ 3.0 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    2 (sd high-speed)
signal voltage: 0 (3.30 V)

root@apalis-tk1:~# hdparm -t /dev/mmcblk1

/dev/mmcblk1:
 Timing buffered disk reads:  62 MB in  3.00 seconds =  20.66 MB/sec
6

Marcel,

Thank you for responding. I had previously tried your suggestion and got the same results. The problem was the actual WiFi would enumerate but then fail. I retried today and got the same results. I realized maybe the problem is in the Laird ST60 driver. I have forwarded the results to the Laird Tech Support. Thank you for your help

7

You are very welcome.

Should you require further assistance please provide more information including log files, changed configuration and such.

8

I wanted to add a final comment. After reviewing all the kernel source, I discovered the following in the sdhci.h file:

/* The system physically doesn't support 1.8v, even if the host does */
#define SDHCI_QUIRK2_NO_1_8_V				(1<<2)

I then added setting to the sdhci-tegra.c file:

#define TEGRA_SDHCI_QUIRKS2	(SDHCI_QUIRK2_PRESET_VALUE_BROKEN | \
		  SDHCI_QUIRK2_NON_STD_VOLTAGE_SWITCHING | \
		  SDHCI_QUIRK2_NON_STANDARD_TUNING | \
		  SDHCI_QUIRK2_NO_CALC_MAX_DISCARD_TO | \
		  SDHCI_QUIRK2_NO_1_8_V | \
		  SDHCI_QUIRK2_REG_ACCESS_REQ_HOST_CLK)

This solved my problem. Thanks for the help

9

Perfect that your problem is solved. Thanks for the feedback.