T20: slave SPI muxing problem

On our T20 board, running Linux version 3.1.10-ga0dd2ebf623c we need to support the SPI1 port in slave mode.
Only SPI1_CHK,SPI1_CS0_N and SPI1_MOSI lines are required.
Firstly, we mapped SPI1_CHK,SPI1_CS0_N on dte mux group, and SPI_MOSI on sppid group.
We checked runtime that the mapping was correct.
However the slave SPI1, correctly driven by a SPI master, did not receive any data: the input FIFO was not touched.
We noted that SPI1_CS0_N input pulsed by SPI master did not return regularly to zero V level, but was about 700 mV before the 22 Ohm protection resistor, and more than 1 V if tested directly on T20 pin.
This was a level contemption symptom, which disappeard when we configured such pin as GPIO input.
Then we left this GPIO input on dte, and moved SPI1_CS0_N to spie group: this time level contemption was absent, but again SPI1 did not receive any data.
Then we configured SPI1_CHK pin as an input on dte, and moved SPI1_CHK to spie group.
This time SPI1 was receiving correctly all the data transmitted by master.
How to overcome this problem ?
Please note that we could not find online any errata document for Tegra 2.

Thank you for your attention.

Michele Venturi.

Such asymmetrical pin muxings a are not allowed as per regular TRM. No errata need for that one. So please always mux a complete set of functionally related pins to the exact same muxing to avoid such issues.

Hi @Miguelon @marcel.tx ,

could you provide some information where you have done the neccessary muxing changes to which file of the source file(s)?

I do not find the kernel config or any dependent device description file where I could apply the change to the spi3.

Thanks in advance
Armin

Hi @CoQuarksde ,

is this related to the other support request, that we talked about last month?

Please check your messages, so we can arrange the next steps.

Best Regards
Kevin