I am trying to hook up an ENC28J60 ethernet chip to the SPI interface on the Verdin development board (Rec 1.0). For development purposes, I used an ENC28J60 development board. The connections I have made are level shifted on the devboard:
SPI_CS = SODIMM_202 → To ENC28J60_CS
SPI_MOSI = SODIMM_200 → To ENC28J60_SI
SPI_MISO = SODIMM_198 → To ENC28J60_SO
SPI_CLK = SODIMM_196 → To ENC28J60_SCK
I have added the driver to our software stack, and I am working on the device tree.
I used this device tree, and I have created this overlay to configure the ENC28J60 HW in the device:
When I boot the verdin the kernel gives me the following messages:
[ 5.644704] enc28j60 spi1.0: Ethernet driver 1.02 loaded
[ 5.652500] enc28j60 spi1.0: chip not found
[ 5.656719] enc28j60: probe of spi1.0 failed with error -5
Which tells me that there is an IO error. Now I have hooked up a logic analyzer directly on the dev board, and captured the signals on boot when the kernel is probing for the ethernet chips. This gives me the image in the attachment. What I find strange is that:
The CS is not driven low
The clock is not showing anything
The MOSI is giving an unexpected pattern
At this point I am puzzled what is wrong and what next steps I can try. As far as I can judge, I used the device tree provided by Toradex, assuming that this is correct. So my question is twofold:
Are there successful interactions with the SPI interface and the given device tree known?
What could I try to further find the cause of the malfunctioning?
The versions I used:
Verdin IMX8MM Q 2GB WB IT V1.1A
Linux 5.4.47 (Custom build with buildroot)
Verdin development Board V1.0B
Hi Henrique,
Thanks for your quick response. You are correct in pointing out the error. However, unfortunately, this is only an on my side in providing the wrong link. I did you the mini device tree. This is the correct device tree.
Thank you for your response. I did not realize that we were using a older development board. It is indeed a good idea to upgrade to a newer version so that the verdins we are using are compatible with the development board.
However, I do have an additional question in the meantime: can you help me understand why our current development board does not work? The SPI_1 interface that we are using is listed as always compatible in this manual. Since we are using this SPI interface, a GPIO pin that is also marked as always compatible and the level shifters on the development board I don’t see why the setup with the ‘outdated’ devboard does not work.
You are correct: the SPI_1 interface is indeed always compatible. This means that we can expect all modules from the Verdin family to have the SPI_1 interface pins always in the same SODIMM pin number. You can take a look at the https://docs.toradex.cn/109262-verdin-family-specification.pdf documentation to better understand the meaning of “Always Compatible” and other definitions (section 2. Module Overview, specifically ). Also, sections 6 (Appendix A) and 7 (Appendix B) show us tables with the pin and interfaces according to the Verdin family specification.
On Toradex BSP 5.2 we had also an update of the Downstream Linux Kernel release by NXP when compared to BSP 5.1.0 (5.4-2.1.x → 5.4-2.3.x).
We could try to understand what changed where, but it would be too time-consuming and time is a precious resource
