Set slew rate or drive strength on lcd controller of the vf50 running Linux?

Technical Support
, , , ,
1

Has anyone changed the SRE or DSE on the VF50? Where does one change the setttings? Changing these to lower EMC problems from the clock to a LCD. Running uboot 2015.04, linux 4.1.15 (Angstrom v2014.12)

Thanks in advance,
Paul

2

The SRE and DSE settings are controlled from device tree. See the Device Tree Customization article and the corresponding settings in device tree for DCU pins here in the Linux kernel source tree.

3

Neither the DTC page nor the DCU pin description shows how to set the drive strength.
The DCU pins description has a gap of what is in the vf-colibri-eval-v3.dtsi file and how to specify the drive strength. Searching web pages on toradex.com has come up empty for material on setting this. How would I modify the following to add SRE or DSE settings??

&dcu0 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_dcu0_1>;
    display = <&display>;
    status = "okay";

    display: display@0 {
	    bits-per-pixel = <16>;

	    display-timings {
		    native-mode = <&timing_vga>;
		    /* Standard VGA timing */
		    timing_vga: 640x480 {
			    clock-frequency = <25175000>;
			    hactive = <640>;
			    vactive = <480>;
			    hback-porch = <40>;
			    hfront-porch = <24>;
.
.
.
4

As mentioned in the Device Tree Customization article

Pin configurations such as pinmux or drive strength settings are defined by the pinctrl-vf610 driver. The base device tree vfxxx.dtsi defines the base configuration and allows these entries to be extended through the iomuxc label. To configure a pin, a device tree node inside the pin controller node with the property fsl,pins is required. Cells need to be assigned to the property, each pin requires 5 cells. However, the first four are usually given by a pre-processor macro (see arch/arm/boot/dts/vf610-pinfunc.h), only the last cell need to be provided. This last cell contains the pin settings in a hexadecimal notation.

The bitwise definition for the last cell is given by the registers of Vybrids Input/Output Multiplexer Controller in which bit 8-6 is DSE and bit 11 is SRE.

Did you refer the DCU pinctrl node which has the last cell to be modified for SRE and DSE?

5

Got this working. Modify vf-colibri.dtsi, ssection titled ‘&iomuxc’, group called ‘pinctrl_dcu0_1’. Changing the bit settings for SRE amd DSE in the word. All the defines are titled “VF610_PAD_PTExx__DCU0_xxxx”.

For EMC, also changing the pixel clock helped a lot too. In vf-colibri-eval-v3.dtsi the section for the mode you are using, modify the ‘clock-frequency’ number. This can be experimented by changing the pixel clock on the command line with ‘fbset’ command. Use “-t” to change settings, you can see what’s used with just issuing the fbset command alone. I’ve always echoed all the settings so a typical command was “fbset -t 50000 216 40 35 10 128 2”, and I was changing the pixel clock from 50000 to something else. (The fbset command shows the resulting setting in plainer english.)

6

Thanks for the update, glad it worked.

Just wanted to point out for other readers that the fbset trick only works with the fbdev based driver (Linux 4.1 and older). With V2.6, Linux 4.4 and later the kernel uses a DRM based DCU driver, which does not allow to alter the pixel clock via fbset. Changing the pixel clock at runtime is not possible, and at compile time this requires to change the simple panel driver ( drivers/gpu/drm/panel/panel-simple.c).