Hello,
We are building an Ethernet Adapter for Colibri Evaluation Board in order to test the second ethernet port of colibri imx7-emmc-1GB SOM.
Here is our system configuration:-
We have built an adapter PCB based on KSZ8041 using RMII protocol. Attached is the PCB schematic.
schematic (1).pdf (147.0 KB)
We wire the PCB J2 connector with the following pins of Colibri Evaluation Board using jumper wires:-
RMII0_MDIO → SODIMM 188 (Colibri Evaluation Board A20)
RMII0_RXD1 → SODIMM 116 (Colibri Evaluation Board A18)
RMII0_CRSDV → SODIMM 122 (Colibri Evaluation Board A19)
RMII0_TXEN → SODIMM 133 (Colibri Evaluation Board SODIMM 133)
RMII0_TXD1 → SODIMM 130 (Colibri Evaluation Board B24)
XIN → SODIMM 106 (Colibri Evaluation Board C27)
RMII0_MDC → SODIMM 178 (Colibri Evaluation Board B12)
RMII0_RXD0 → SODIMM 114 (Colibri Evaluation Board C17)
RMII0_RX_ER → SODIMM 124 (Colibri Evaluation Board C19)
RMII0_TXD0 → SODIMM 127 (Colibri Evaluation Board SODIMM 127)
Now we created the attached overlay and using TorizonCore builder we deploy it on the board.
colibri-imx7_second_ethernet_overlay.dts (5.3 KB)
The second ethernet link works but with Rx errors
Please help.
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Hello,
To address the issue of receiving errors on the second Ethernet link on your Colibri iMX7D-EMMC 1GB SoM using a custom Ethernet adapter PCB based on the KSZ8041 PHY and RMII protocol, let’s proceed with a systematic approach:
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Verify Hardware Connections: Ensure all physical connections between the Colibri Evaluation Board and your custom adapter PCB are secure and correctly mapped to the respective pins as per your schematic. Incorrect or loose connections can often lead to transmission errors.
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Check PHY Configuration: The KSZ8041 PHY configuration in the device tree overlay must match the hardware design, especially the RMII interface settings. Ensure that the PHY address set in the device tree matches the hardware configuration.
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Review Clock Configuration: RMII requires a 50MHz reference clock for operation. Verify that the XIN connection provides a stable 50MHz clock to the PHY. Inconsistencies or instability in the clock signal can cause reception errors.
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Inspect Power Supply: Ensure that the KSZ8041 PHY is receiving a stable power supply as per its requirements. Power supply issues can lead to erratic behavior and errors.
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Examine Signal Integrity: Long jumper wires or improper PCB layout can lead to signal integrity issues, especially at high frequencies. Ensure that the signal paths are as short as possible and consider using twisted pairs for differential signals like RXD and TXD lines.
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Software Configuration: Double-check the device tree overlay for any misconfigurations. Pay special attention to the RMII mode settings, PHY address, and any specific configurations required by the KSZ8041 that might differ from the default settings.
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Update and Patch: Ensure that your TorizonCore and Linux kernel are up to date. Sometimes, specific issues with hardware compatibility are addressed in newer kernel versions or patches.
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Debugging: Utilize the Ethernet statistics and error counters available in the Linux kernel to identify the type of Rx errors occurring. This can provide insights into whether the errors are collision-related, CRC errors, or others.
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Cross-Reference with Reference Designs: Compare your design and software configuration with available reference designs and documentation for the Colibri iMX7 and KSZ8041 PHY. Sometimes, subtle differences in configuration or hardware design can lead to issues.
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Consult KSZ8041 PHY Documentation: Review the KSZ8041 datasheet and application notes for any specific considerations or recommendations regarding RMII operation, which might
Please, also check if these links can help you solve your problem:
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