We are designing our own carrier board for the above listed Apalis module. The carrier will provide WiFi through SDIO UHS-I SDR104 @ 1.8V.
We know 1.8V is not possible for iMX.6. So this one will be 3.3V.
But the iMX.8 and TK1 can be set to 1.8V. It looks like the switch can be achieved by setting a bit in a register. Is this right? Is there anything to do from the HARDWARE perspective to make the switch?
What is the list of IOs that are affected by the 1.8V/3.3V switch?
Where can I find that information?
Please check chapter 2.13 SD/MMC/SDIO of Apalis Carrier Board Design Guide.
Ah! That’s good stuff! Thanks.
Looking at the iMX.8 (5.14) and TK1 (6.13) Apalis datasheets, I understand I have to configure the PMIC (through I2C) to switch between 3.3V and 1.8V. Where can I find details on this?
- Which I2C port (of the CPU) are the PMIC connected to?
- What is the complete PMIC P/N on the iMX.8 (NXP xxxPF8100xxx)?
- What is the complete PMIC P/N on the TK1 (AMS AS3722xxx)?
Where can I find details on this?
You have to look in the devicetree files of the specific modules.
Which I2C port (of the CPU) are the PMIC connected to?
This is described in the datasheet of the module.
What is the complete PMIC P/N on the iMX.8 (NXP xxxPF8100xxx)?
It is the MC34PF8100A0EP
What is the complete PMIC P/N on the TK1 (AMS AS3722xxx)?
It is the AS3722-BCTT-13.
I’m a hardware guy with very little knowledge of the software side of things. I will be connecting a 1.8V WiFi card to the MMC2/SD1 port of the Apalis iMX8 & TK1. The WiFi card has absolute maximum rating of 2.2V on its SD port IOs.
Is there a way to make sure the voltage on the iMX8/TK1 SD port IOs will never exceed 1.8V during power-up?
Is there a way to configure the iMX8/TK1 PMIC for 1.8V BEFORE power is actually applied to the SOM/CPU SD port VCCIO pin?
Would this be a UBoot or hardware task (eg PMIC OTP memory)?
According to spec SD/SDIO lines usually starts at 3.3 volts doing some negotiation and only then upon mutual agreement switches to 1.8 volts. So both iMX8 and TK1 SDIO follow that standard. On TK1 PIMIC fused to apply no voltage on SDIOrails during boot up. This means the rails are enabled by the software and therefore under full control of U-Boot and then Linux. Please check
(e.g. here http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-pmic.dtsi?h=toradex_tk1_l4t_r21.7#n335 and here http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-pmic.dtsi?h=toradex_tk1_l4t_r21.7#n449).
On the i. MX 8/8X this may be rather difficult as the SD/SDIO signalling voltage switching is not under Linux’ control but rather done by the SCU.
From what I read, the SCU is a Cortex-M4. Is it possible to modify the code such that the MMc1/SD2 interface starts at 1.8V (ie no negociation)?
On the iMX8, is the negotiation under Linux control? If so, how is Linux requesting the SCU to switch to 1.8V?
No, it is handled implicitly by ESDHC/SCFW.