PWM_A polarity in the bootloader of VF61

I need to control the backlight of LCD both with BL_ON (SODIMM 71) and PWM_A (SODIMM 59) pins.

In the bootloader I can use setconfig ss to set bl_gpio and bl_pol.

In this way, pin BL_ON works as expected.

On the other side, I can’t find any way to configure PWM_A and so I supposed the bootloader leaves this pin configured as an input. But it doesn’t seem so, ad it seems that the bootloader drives PWM_A (SODIMM 59) LOW.

Could you confirm this?

If this is the case, is it possible to add a new ss parameter to setup PWM_A polarity?

This is not ok for me, since I need an “active high” PWM_A.

Is it safe if I overwrite GPIO configuration of this pin through setconfigenter code here gpio bootloader command.

I’m worried about a conflict while driving this pin.

Our display drivers don’t handle PWM signals for brightness, but they can only handle ON/OFF signals through regular GPIOs. There are 2 signals which are used to control power: BL_GPIO for the backlight and DISP_GPIO for the display power supply. Very often the latter one is not used.

The PWM signal on SODIMM 59 needs to be controlled by your application. For the boot time you can easily configure it to full brightness - configure the bootloader to set this pin to GPIO, output, high (or to GPIO, input, pullup, if you like it better). This is safe and doesn’t create any conflicts.

However, SODIMM 59 is special on the Colibri VF61, because it is connected to 2 CPU pins: PTB0 (GPIO 22) and PTC7 (GPIO 52). Here you need to be careful to not drive the two CPU pins against each other.
The PWM feature is on PTB0, therefore I recommend to configure PTC7 to be inactive:

>set gpio.bootconf "[gpio_52]altfn=-1 dir=in pull=none [gpio_22]altfn=-1 dir=out lvl=1 pull=none"
>save gpio

Additional Note:
In Eboot V1.5 there is a bug: when you verify the bootconf setting by entering set gpio, only the configuration for the first gpio ([gpio_52] in this case) will be shown. All further gpio settings are not shown, but they are applied to the hardware anyway.


maybe I didn’t fully clarify my doubt:

I know I must control SODIMM 59 from my application, and this is not a problem.

I need to be sure that neither the bootloader, not the Win CE OS configure somehow SODIMM 59 (otherwise I can get some conflict when I try to control it).

During the boot, SODIMM 59 is driven LOW and I don’t think this is the standard out-of-reset behavior for the VF61 pin.

Could you confirm that SODIMM 59 is explicitly set LOW during the boot?

Could you confirm that I can reconfigure GPIO 22 and GPIO 52

>set gpio.bootconf = "[gpio_52]altfn=-1 dir=in pull=none [gpio_22]altfn=-1 dir=out lvl=1 pull=none"
>save gpio

without any conflict (against what sets SODIMM 59 LOW as it is now)?

Dear @vix

Your doubts were clear, I just didn’t express the solution clear enough.

The bootloader configures PTC7 to GPIO, output, low in an early stage. We can overrule the configuration with the set gpio.bootconf... command, because this is applied later (actually a short low-pulse on SODIMM 59 results).
I verified this behavior and can confirm that after applying the gpio.bootconf setting, neither PTB0 nor PTC7 are touched by any part of the bootloader or WinCE OS. The suggested configuration is safe.

Regards, Andy