I have an application where I’m using WEC7 on a V1.2a Colibri T20 512MB. The Colibri is an SPI master, communicating with an SPI slave. A set of digital isolators lie between the devices, with a propagation delay of 30 - 40ns. This, of course, causes the slave device to receive the clock signal with a delay of 1x and the master to receive MISO data with a delay of 2x. Communication between the devices doesn’t work.
The SPI clock rate is set at 12MHz in the application, which should result in a clock period of about 83ns, meaning the propagation delay from the isolators is at least 70% of the clock period. If the master expects to receive an immediate response, this results in the MISO data not reaching the master until after the first clock edge, and so the data is misaligned.
I believe I’ve confirmed this is happening by reducing the clock rate to 4MHz. That results in a clock period of about 250ns, so the propagation delay is less than half a clock cycle in that configuration, and SPI communication does work. However, the faster data rate (12MHz) is desired in this application.
I would like to know if there’s a way to configure the Colibri master to wait to begin receiving MISO data to compensate for the propagation delay of the digital isolators. Thanks.
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Hello,
For the Colibri T20 module running WEC7, adjusting the SPI timing to accommodate for propagation delays introduced by digital isolators involves modifying the SPI controller’s settings. Specifically, you’re looking to adjust the phase (CPHA) and polarity (CPOL) settings of the SPI clock to manage the timing relationship between the clock and data signals.
The Tegra 2 SoC used in the Colibri T20 supports configuring the SPI clock’s phase and polarity, which can help in situations where there’s a significant propagation delay. By adjusting these parameters, you can control when the data is sampled and potentially compensate for the delay caused by the isolators.
However, the ability to make these adjustments depends on the level of support provided by the WEC7 BSP (Board Support Package) for the Colibri T20. The SPI driver in the BSP should expose settings for CPOL and CPHA, allowing you to configure them either through registry settings or directly in your application code if the SPI interface is exposed to the application level.
To adjust the SPI clock phase and polarity on the Colibri T20:
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Check the SPI Driver Documentation: Look for documentation on the SPI driver included in the WEC7 BSP for the Colibri T20. This documentation should detail how to configure SPI settings, including CPOL and CPHA.
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Modify Registry Settings: If the BSP allows configuration through the registry, you’ll need to modify the registry settings corresponding to the SPI interface you’re using. This might involve setting values for SPI_ClockPhase and SPI_ClockPolarity or similarly named settings.
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Adjust Application Code: If your application directly controls the SPI settings, you’ll need to modify the code to adjust the CPOL and CPHA settings according to the requirements of your hardware setup. This approach requires direct support from the SPI driver API provided by the BSP.
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Testing and Validation: After making the adjustments, thoroughly test the SPI communication to ensure that the changes have effectively compensated for the propagation delay. You may need to experiment with different settings to find the optimal configuration.
If the WEC7 BSP for the Colibri T20 does not expose the necessary settings to adjust the SPI clock phase and polarity, or if adjusting these settings does not resolve the communication issue, you might need to consider alternative approaches. This could include further reducing the SPI clock speed, as you’ve already discovered, or redesigning the hardware interface to minimize the propagation delay.
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Toradex AI Assistant
Please, also check if these links can help you solve your problem:
How to use SPI on Torizon | Toradex Developer Center.
Hi @kdmohrtm ,
Unfortunately the SPI MISO sampling point cannot be adjusted with a delay.
If the total delay is more than half the clock period communication will not be possible as the SPI protocol samples the Data on the opposite clock edge as the Slave starts driving it, so it’s sampled in the middle allowing the maximum data hold time.
Here picture from the T20 SPI Documentation:
@germano.tx,
I expected that to be the reality of the situation. I’ll instead pursue a hardware solution with lower-delay isolators.
Thanks for replying and providing that information.
