I’m creating my own carrier board. And I’m at the point were I’m using the Pinout designer.
Once I verify my pins how do I control the pin mux with torizon os. In general I need a lot of GPIO, and I’m removing feature I don’t need like CAN, PWM, SD etc. Is there a mechanism with in Torizon OS to control the GPIO mux’s?
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Hello,
When designing your own carrier board and using the Pinout Designer for Toradex modules, controlling pin multiplexing (muxing) under TorizonCore involves a few steps. TorizonCore, being a Linux-based OS, provides several mechanisms to control GPIOs and pin muxing, primarily through device tree overlays and the sysfs/gpiochip interface for runtime GPIO control.
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Device Tree Overlays: To configure pin mux settings that are applied at boot time, you’ll likely need to create or modify device tree overlays. Device tree overlays allow you to specify the configuration of various hardware interfaces and GPIO pins without altering the main device tree. This is particularly useful for enabling, disabling, or reconfiguring interfaces like CAN, PWM, SD, etc., as per your requirements.
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Sysfs/gpiochip Interface: For runtime control of GPIOs, Linux exposes GPIOs through the sysfs interface, allowing user space applications to control GPIO direction (input/output), value (high/low), and sometimes pull-up/pull-down settings. However, with the introduction of the new GPIO character device interface in recent Linux kernels, it’s recommended to use the newer interface (
/dev/gpiochipN
) for managing GPIOs at runtime. This interface is more robust and provides better features compared to sysfs. -
Libgpiod: As part of managing GPIOs at runtime, you might consider using
libgpiod
, a C library and set of tools for interacting with the GPIO character device. It provides a more straightforward API for GPIO manipulation in user space, replacing the older direct sysfs usage. -
TorizonCore Builder: To integrate your device tree changes or overlays with TorizonCore, you can use the TorizonCore Builder tool. It allows you to customize the TorizonCore image, including adding or modifying device tree overlays, without the need for a complete Yocto build environment. This tool simplifies the process of customizing the OS to match your hardware design.
Remember, when removing features like CAN, PWM, SD, etc., ensure that the corresponding drivers or kernel modules are either disabled or not included in your final TorizonCore image to save resources and potentially reduce boot time.
For specific GPIO muxing settings, refer to the processor’s datasheet and the reference manual to understand the multiplexing options available for each pin. This information is crucial when creating or modifying device tree overlays to match your hardware configuration.
Best regards,
Toradex AI Assistant
Please, also check if these links can help you solve your problem:
High performance, low power Embedded Computing Systems | Toradex Developer Center.
Hey @jeffbelz,
This is done by modifications in the the device tree or writing a device tree overlay to implement the changes you want.
I would review this page on Pin Multiplexing. It gives good guidance on the steps needed.
I would look at pages 26 and 27 on the Verdin IMX8mp datasheet, the SoC Functions List. this will tell you the alternative functions each pin can do.
-Eric
Hi, I’m the Toradex AI Assistant. The Toradex Support team will follow up with you shortly!
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To control the pin multiplexing (pin mux) on Torizon OS, you will need to modify the device tree. Torizon OS itself does not provide a direct mechanism to control pin muxing dynamically; instead, this is typically done through device tree modifications.
Here are the general steps you would follow:
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Identify the Pins and Their Functions:
- Use the Pinout Designer to identify the pins you want to use as GPIO and the ones you want to disable (like CAN, PWM, SD, etc.).
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Modify the Device Tree:
- You will need to create or modify a device tree overlay to change the pin functionalities. This involves editing the device tree source files to set the desired pins to GPIO mode and disable the functions you don’t need.
- Refer to the Pin Multiplexing - Changing Pin Functionalities in the Linux Device Tree article for detailed instructions on how to do this.
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Compile the Device Tree:
- After making the necessary changes, compile the device tree source files to generate the device tree blob (DTB) file.
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Deploy the Device Tree:
- Replace the existing DTB file on your Torizon OS with the newly compiled one. This can be done by copying the DTB file to the appropriate location on the boot partition of your device.
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Reboot the Device:
- Reboot your device to apply the changes. The new pin configurations should now be in effect.
Example Steps:
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Edit the Device Tree Source:
- Locate the device tree source file for your specific SoM and carrier board.
- Modify the pinctrl settings to set the desired pins to GPIO mode. For example:
&iomuxc { pinctrl_gpio: pinctrl_gpio { fsl,pins = < MX8MM_IOMUXC_SODIMM_210_GPIO3_IO05 0x1c4 /* Set SODIMM_210 to GPIO */ /* Add more pins as needed */ >; }; };
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Compile the Device Tree:
- Use the device tree compiler (DTC) to compile the source file:
dtc -I dts -O dtb -o my_custom.dtb my_custom.dts
- Use the device tree compiler (DTC) to compile the source file:
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Deploy the Device Tree:
- Copy the compiled DTB file to the boot partition of your Torizon OS device:
cp my_custom.dtb /boot/
- Copy the compiled DTB file to the boot partition of your Torizon OS device:
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Update the Boot Configuration:
- Ensure that the bootloader (U-Boot) is configured to use your custom DTB file.
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Reboot:
- Reboot the device to apply the new configuration.
By following these steps, you can control the pin muxing on Torizon OS to configure the pins as GPIO and disable the features you don’t need. If you need more detailed guidance, refer to the Toradex documentation on device tree customization.
Please, also check if these links can help you solve your problem: