Pinout Clarification for Colibri SoM i.MX6ULL


I just want to confirm and clarify some points about the GPIO on the Colibri documentation:

The following GPIO (Connector/Module PIN | Default Colibri Function | i.MX 6ULL BALL) :

180 DATA31    GPIO1_IO06

My current understanding is: neither 180 nor 184, defined as “default colibri function”, could be used without disabling ENET2 (for external PHY) AND ENET1 (Used on the Micrel KSZ8041). Because the 180 and 184 pin of the module are shared internally with the ENET1 PHY even when you don’t use ENET2 pins for an external PHY.

is it right ?

Best Regards,

Hi @RoTTe

Thanks for writing to the Toradex Community!

Could you provide the version of the Hardware (including carrier board) and software of your module?

What is your application?
What are you trying to do?

Best regards,


The current hardware is a custom carrier board based for colibri interfaces plugged with a Colibri iMX6ULL 512MB Wi-Fi / Bluetooth V1.1A.

Our application just use a several GPIOs that were marked as “default colibri function” but in the SoM seems to be reused -internally- o mixed with some ENET2 pins and exposed to the pinout on the module, so we can’t use some GPIOs on i.MX6ULL carrier boards because the assign signal is not clearly specified in the General Colibri Design Guide and the datasheet for the colibri SoM itselt just explicity the signal as “non standard funcion”, related with ENET2 … but it seems that it is related with ENET2 and ENET1.

The main issue resides on 184 pin, GPIO1_IO07, this pin boot in ALT5 state: GPIO1.IO07. Disabling the ENET2 interface (fully, we don’t use any part or pin of those) force the ENET1 interface to go down, because the 184pin is shared with the external ETH2 pinout, hence, you can’t use this pin without disabling both ethernet interfaces. Or … just don’t use at all because you only can use if you planned to put an ethernet 2nd interface.

The main issue is that somehow, ENET1 and ENET2 shared some lines with a few pins, makeing them unsable for generic uses.

I just want a confirmation about this issue, and if it is true, move to another GPIOs mappings… “problematic” with “shared” signals.

Thank you,

Hi @RoTTe

The SODIMM pins 180 and 184 cannot be used as GPIOs, if you need any of the both Ethernet PHYs. So your understanding is correct.

Best regards,