PCIe refrence clock is not getting from som

Hi @toradex,

We have connected i210 Ethernet converter on pcie. This is not working so we have verified the all signals.

PCIe refrence clock signals are not getting from SOM.

Please anyone help me on this.

Thanks & Regards,

Narayana Swamy M

Hi @narayanaswamym,

Are you still having this issue?

Best regards,
André Curvello

Hi @andrecurvello.tx ,

Thank you for reply,

At power on for some time we are getting reference clock,but i210 Ethernet controller in not detected.

Hi @narayanaswamym,

Ok. So please provide more information for us to help you:

  • Which carrier board are you using? If one from Toradex, please provide the model and version.
  • Which Operating System are you using on Apalis iMX6Q? Please provide a version as well.
  • Please provide any device-tree files and kernel defconfig that you may have changed for your case.

Best regards,
André Curvello

Hi @andrecurvello.tx,

We are using our custom carrier board and the Linux Kernel version is 5.4.77.

Here are the dts file and kernel def config file

Hi @narayanaswamym,

Thanks for providing the Kernel version, but can you confirm if you are using TorizonCore or a custom Yocto Build with BSP 5?

Do you have in your company an Apalis Evaluation Board?

It’s an engineering evaluation board from Toradex for the Apalis family with 2 PCI-e ports, so it could be interesting for you to test against a validated hardware reference.

The PCI-e is enabled by default on our BSP, so it should be expected to work “out-of-the-box”, considering that the hardware interfaces are OK.

About your DTS, I saw that you’ve added more two pcie-switches:

	pcie-switch@38 {
		compatible = "plx,pex8605";
		reg = <0x38>;

	pcie-switch@3a {
		compatible = "plx,pex8604";
		reg = <0x3a>;

Are you able to see these switches over I2C?

How is your PCI-e card connected over the PCI-e switches?

The PCI-e has a process called “Link Training Status and State Machine (LTSSM)”, in which it starts a handshake process between the devices before starting the clock. If the handshake does not succeed, there will be no clock supply. that’s why you don’t see any clock output from Apalis.

You can see more details at this Xilinx material which explains this process.

If you want us to have a look at your schematics, please send us them at support@toradex.com.

Please paste here the support ticket when you have it, for me to track it.

I don’t know if you went through the steps of Apalis Carrier Board design guide, in chapter 2.2 you’ll find details about PCIe.

Best regards,
André Curvello

Hii @andrecurvello.tx ,

We are using Yocto BSP.

Do you have in your company an Apalis Evaluation Board?–> Yes we have it. With this EVB we are able to detect PEX8605 pcie switch.

In our custom carrier board we have PEX8604. This PCI switch is not detecting. We tried googling this issues,then found some patches related to delay addition in reset assertion in pci-imx.c source file. Then sometimes hub is detecting(very rare).

Out hardware architecture is Apalis module–> PCI switch(8604) → I210.
Clock are given through clock buffer(9DB633).

snap of schematics

we have one difference when compared to evaluation board is reset of PCIe switch,we tried by changing our reset to GPIO7(similar to evaluation board). we are able to detect PCIe switch and I210 some times.

Please help on this,

Thank you