NTSC output on VGA APALIS IMX6

Technical Support
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1

Hi,

I explain my need and what i have already done.

I need an NTSC video output for Apalis on a CVBS connector.

I use the AD723 chip from Analog device.
I update the file bellow for the kernel update :

~/linux-toradex/drivers/video/fbdev/mxc/mxc_vdacif.c

        /* 3 640x480-60 VESA */
        { NULL, 60, 640, 480, 79364,  48, 16, 33, 10, 96, 2,
          FB_SYNC_OE_LOW_ACT, FB_VMODE_INTERLACED, FB_MODE_IS_VESA },

The output of the AD723 is readable but awful.

The apalis show this error periodicaly :

[  552.730680] imx-ipuv3 2800000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00080000
[  552.730711] mxc_sdc_fb fb@0: 640x480 h_sync,r,l: 96,16,48  v_sync,l,u: 2,10,33 pixclock=12600000 Hz
[  552.779673] mxc_sdc_fb fb@0: 640x480 h_sync,r,l: 96,16,48  v_sync,l,u: 2,10,33 pixclock=12600000 Hz
[  552.829093] mxc_sdc_fb fb@0: 640x480 h_sync,r,l: 96,16,48  v_sync,l,u: 2,10,33 pixclock=12600000 Hz
[  552.879105] mxc_sdc_fb fb@0: 640x480 h_sync,r,l: 96,16,48  v_sync,l,u: 2,10,33 pixclock=12600000 Hz
[  552.945523] imx-ipuv3 2800000.ipu: IPU Warning - IPU_INT_STAT_10 = 0x00080000

The fbset give this information

mode "640x480-60"
    # D: 12.600 MHz, H: 15.750 kHz, V: 60.001 Hz
    geometry 640 480 640 480 16
    timings 79364 48 16 33 10 96 2
    laced true
    rgba 5/11,6/5,5/0,0/0
endmode

My monitor has detected a 480i entry yesterday but does not detect anything today.

Where are my mistakes?

Regards

2

Hi,

I go back to the 720x480 resolution and use the patch 0001 and 0004 from here
https://share.toradex.com/jozl1zbfdxdqmuz?direct

I have look at the HSYNC VSYNC timing from my camera and i try to reproduced these timing by kernel configuration.

Camera timing :

  • HSYNC 31.9us period with 2.371us high
  • Vsync 16.64ms with 190us high

Timing with the following configuration:

  • Hsync 64us period and 8us high
  • vsync 16.63ms period and 190us high

I’m near to the result but i have a hsync period is double a what i want and the line length is double of what i want too.

How can i change only this parameter?

        /*NTSC */
        { NULL, 60, 720, 480, 63600, 114, 38, 31, 8, 124, 6,
          FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_LOW_ACT,
          FB_VMODE_INTERLACED, FB_MODE_IS_VESA },
};



fbset -i

mode "720x480-60"
    # D: 15.723 MHz, H: 15.786 kHz, V: 60.139 Hz
    geometry 720 480 720 480 16
    timings 63600 114 38 31 8 124 6
    hsync high
    vsync high
    laced true
    rgba 5/11,6/5,5/0,0/0
endmode

Frame buffer device information:
    Name        : DISP4 BG
    Address     : 0x6a400000
    Size        : 8357760
    Type        : PACKED PIXELS
    Visual      : TRUECOLOR
    XPanStep    : 1
    YPanStep    : 1
    YWrapStep   : 1
    LineLength  : 1440
    Accelerator : No
3

Hi @mazareth:

Could you describe briefly what is working and what is not working? How did you calculate the timings for Hsync and Vsync?

Since you have a customised not trivial system, it would be helpful to describe your application with inputs and outputs.

Thanks and best regards, Jaski

4

Hi @jaski.tx :

I have a video input with this card :
https://www.toradex.com/accessories/analogue-camera-adapter

I have a apalis evaluation board v1.1A with Apalis iMX6 Quad 2GB IT | V1.1C on it.

I use the kernel Apalis-iMX6_LXDE-Image_2.7-20180104
I patch my linux kernel with the patch 0001 and 0004 from here :
Patch for iMX6 BSP to support interlaced display on HDMI and LCD interface
And i update the file to search good timing
~/linux-toradex/drivers/video/fbdev/mxc/mxc_vdacif.c

And for output i have the AD723 evaluation board on the vga output.
Finally i have a Trinitron SONY analog display.

I read hsync and vsync timing with an oscilloscope
and verify with fbset if my parameter is updated correctly.

PS: in fact, the camera input in not the good reference because they don’t have the same protocol. BT.656 for analog camera and RS170A for AD723

5

Thanks for the answer and the valuable Information.

I read hsync and vsync timing with an oscilloscope and verify with fbset if my parameter is updated correctly.

Are you getting good results or is there an Issue?

PS: in fact, the camera input in not the good reference because they don’t have the same protocol. BT.656 for analog camera and RS170A for AD723

Yeah, this makes the whole system more complicated. Did you try NTSC/PAL Encoder with BT.656 protocol as this one?

6

@jaski.tx

A board is being designed with

  • AD723 on VGA just in case of better understanding in the futur and
  • ADV7393 on lcd output
  • VGA output if both do not work

Regards

7

Thanks for this Information. After the discussion with hardware you should ensure that you have the correct impedance at the VGA Output of the module? You could also upload the connection schematic to the module in a private comment.

Further you should use test images like colour stripes or colour gradients to measure output signals of the RGB_to_NTSC/Pal Converter with the oscilloscope to check if the timing of the signal is correct.