MTD configuratio on Colibri IMX7D module

Good morning,
I have a board in development with the Colibri IMX7D 1GB V1.1A and linux 4.9.166-2.8.6+gd899927728be #1 SMP. On the board I have 2 SPI (ecspi1@3082000000 and ecspi2@3083000000). ecspi1 is reserved to the Cortex-M4 CPU while ecspi2 is connected to an MRAM type MR20H40.
I modified and compiled the kernel enabling in Device Driver

  1. Memory Tecnology Device
  2. SPI-NOR device support
  3. in self-costrained MTD device driver → Support most SPI flash chips.

In the devicetree I’ve inserted what suggested in Documentation\devicetree\bindig\mtd\jedec,spi-nor.txt
and also in partition.txt, but despite no error message or confirmation I can’t find any mtd partition in the /dev. directory. Can you give me some suggestions? I also could not understand how to associate the SPI channel ecspi2 to the MRAM defined in the devicetree.
Best regards.

Hello @bzzpaolo ,

Could you tell us which Carrier board you use?

Thanks and Regards,

Hello @bzzpaolo ,

Thanks. Could you also kindly share with the us the modified Device tree files and the dmesg.log?

Best regards,

attached the device tree files and the dmesg command log.
Best regards, link textPaolo

hi Janani, the carrier board is derived from the Aster V1.1B
Best regards

Hi Janani,
I modified the devicetree as suggested and it works. I found the device in /dev/mtd0. Trying with mtd_debug and flashcp to read and write the device the verification fails. Checking with the oscilloscope the communication between SPI and MRAM MR20H40, this happens with 8 clock burst (CS period), i.e. single burst instead of multiple burst as per MRAM protocol. Any suggestions?
Best regards,

Dear @bzzpaolo ,

Thank you for the files.

Please kindly try the following:

  • Enable CONFIG_MTD_M25P80 in the .config file of the kernel and compile the kernel again. The following article takes you through the steps.

  • Patch the devicetree file with the following patch: (This patch was made assuming you use ecspi3 and when you use other SPI, please move the memory node to the correct place)

     diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi 
     index 80db406fb4f89..f05996dde5950 100644
     --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
     +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
     @@ -151,6 +151,16 @@
                     spi-max-frequency = <23000000>;
                     status = "disabled";
     +       mr20p40: mr20p40@1 {
     +               #address-cells = <1>;
     +               #size-cells = <1>;
     +               reg = <0>;
     +               // mr25 should be compatible with mr20
     +               compatible = "mr25h40", "jedec,spi-nor";
     +               spi-max-frequency = <40000000>;
     +               status = "okay";
     +       };

Best Regards,


Trying with mtd_debug and flashcp to read and write the device the verification fails.

Could you describe what exactly you have done?

single burst instead of multiple burst as per MRAM protocol. Any suggestions?

Which Mram protocol are you talking about? According to the driver spi-nor, MR2540 doesn’t support fast read.

Best regards,

I apologize for the delay.
I enabled in the kernel config the options “<> SPI-NOR device support", and in “Self-contained MTD device drivers” the option "<> Support most SPI Flash chip…” compiled and installed the zImage file in the Colibri module.
The reboot log displays:

[    1.041867] spi_imx 30820000.ecspi: dma setup error -19, use pio
[    1.050676] spi_imx 30820000.ecspi: probed
[    1.057024] spi_imx 30830000.ecspi: dma setup error -19, use pio
[    1.065519] m25p80 spi1.0: mr25h40 (512 Kbytes)
[    1.072215] spi_imx 30830000.ecspi: probed


root@colibri-hw6:~# ls -al /dev/mtd*
crw-------    1 root     root       90,   0 Dec 19  2017 /dev/mtd0
crw-------    1 root     root       90,   1 Dec 19  2017 /dev/mtd0ro

I did a little test run with mtd_debug.

root@colibri-hw6:~# mtd_debug read /dev/mtd0 9 10 test1.mtd

Copied 10 bytes from address 0x7ea43e8900000009 in flash to

if you look at the attached file with the oscilloscope traces (MISO, MOSI, CS and CLOCK) the CS activates every 8 bits, instead of lasting for the duration of the command, as defined in the MR25H40 datasheet. can you help me?
Best regards
alt text

Thanks for the information.

I would need to reproduce this at my place. Could you share the complete changed devicetree files.

Thanks and best regards,

attached the modified device tree text

Hi @bzzpaolo

Thanks for the files. Being at Home Office, I would not able to test the issue due to missing oscilloscope. I will let you know once I have reproduced the issue.

Best regards,

Hi @bzzpaolo

Thanks for your patience. Finally I could reproduce your issue. You need to change the pin muxing for the chip select Pin from this

pinctrl_ecspi2_cs: ecspi2-cs-grp {
		fsl,pins = <
			MX7D_PAD_ENET1_RGMII_TD3__ECSPI2_SS0	0x14		 /* SODIMM 194 */

to this

pinctrl_ecspi2_cs: ecspi2-cs-grp {
    	fsl,pins = <
    		MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9    0x14		 /* SODIMM 194 */

Best regards,