our device connects a STM32F407 uart output to the UART_C input pins on the imx6.
Currently we detect buffer overrun errors at baudrates 115200 and 57600. (ClearCommError reports CE_OVERRUN).
So my question is, what is the maximum baudrate on the UART_C for an imx6 running WEC2013.
Secondly, the Colibri imx6 datasheet mentions “auto-detect baud rate” as a UART feature. Where can I check that value?
Any help is greatly appreciated. Please send me a note, if you need more details.
first of all: thank you for the help and everything works as expected. We now can use 115200baud for communication between the STM32 and the IMX6.
It took a while to find the solution to this problem. First we tried to change the USART Prio to 16 but w/o success. We couldn’t use different USART, since it is hard wired. Then, after many many experiments, we could relate it to a touch event. In one of 100 touches the CE_OVERRUN error was triggered. Again one week later after turning every piece twice of the touch driver we discovered, that the GPIO-Interrupt priority was set to 2 (two)!.. on a wec2013 system maybe not such a good idea.
Now after resetting this priority to 125 everything runs smooth.
Thank you for pointing this problem, THREAD_PRIORITY_ABOVE_NORMAL should not use with CeSetThreadPriority on recent Windows Embedded Compact releases, this should be a problem in the application.
If you set 153-247, Non-real time drivers priority to the HwAdaptPriority might be the best fit for your application.
Also, try to use different UART and let us know if you see the difference in the issue.
I.MX6 supports up to 5Mbit baud rate but our driver limited with 115200. If you want to try 5Mbits, you need to manually configure these two registers UBIR = 0x0003 and UBMR = 0x0004, after serial port API open calls. For more details, please refer : 64.13.2 Programming the UART in 9-bit RS-485 mode in IMX6 TRM.
This can be done using RegAccessTool or MapMem library.
If you increase the priority that would worsen the issue but if you decrease the baud rate that may enough CPU time to read from the FIFO and may suppress the overrun error.