Making PWM Pins (x10 18 & 19, SODIMM 15 & 16) available to the M7 on the mallow carrier board with IMX8MP

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Hello Andrew,

Thank you for your detailed question and for providing your configuration and system info.

Disabling the PWM peripheral nodes in your device tree overlay is an important first step, but to fully free SODIMM 15 & 16 (X10-18 & X10-19) for M7 access as PWM outputs, you also need to deconfigure their pin mux from Linux and ensure they are not assigned to any Linux subsystem. Let me walk you through what’s still needed:

1. Check Pin Multiplexing

Disabling peripherals releases the hardware, but the i.MX8M Plus pins are typically multiplexed (muxed) using the pinctrl subsystem. You need to make sure that the IOMUXC (pin mux) for these pins is not set by any Linux device tree node.

For SODIMM 15 (X10-18) and SODIMM 16 (X10-19), double-check in your base device tree (and overlays) that these pins are not pulled into any Linux pinctrl group.

How to Ensure Proper Pin Configuration

  • Explicitly set them as GPIO (input by default):
    Even if not used as GPIO by Linux, this removes their assignment from PWM or any other subsystem.
    Example node for SODIMM 15 (IOMUXC_GPIO1_IO08 for PWM1, sometimes called PWM1_OUT):

    &iomuxc {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_m7_pins>;

    pinctrl_m7_pins: m7-pins {
        // Assign SODIMM 15 and 16 to GPIO (or leave unused)
        fsl,pins = <
            IMX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x0 /* SODIMM 15, X10-18 */
            IMX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x0 /* SODIMM 16, X10-19 */
        >;
    };
};
    • Use the correct IOMUXC names for your SoC revision.
    • This “unsticks” the pins from Linux (pwm, uart, can, etc.) and leaves them in a default state.

  • Alternatively, completely unconfigured (no assignment):
    The absence of assignment also works; the pins are left as they power up, available for the M7.

2. Check for Conflicts

Even with PWM disabled, these pins may be assigned to other peripherals in the device tree (UART, GPIO expander, etc.). Review which device tree nodes or overlays may reference these pins using the Pinout Designer Tool.

3. Update overlay and Compile

Your overlay should:

  • status = "disabled"; for PWM, UART, CAN, etc. on these pins
  • Remove the pins from any pinctrl groups assigned for Linux use
  • Add an (optional) “dummy” pinctrl group assigning them as GPIO, or just do not set their mux at all.

For overlay guidance:

4. Deploy Overlay and Reboot

Compile the overlay (e.g., using TorizonCore Builder) and deploy as needed:

5. Summary Checklist

  1. Disable Linux peripherals for those pins in the overlay (already done).
  2. Remove those pins from all Linux pinctrl groups.
  3. Optionally assign as GPIO or leave entirely unmuxed.
  4. Compile and deploy overlay, then reboot.

When that’s done, M7 firmware should be able to claim and use the pins for PWM, as Linux will neither control them nor interfere.

Let me know if you’d like a sample overlay skeleton or if you run into trouble.
Best regards,
Toradex AI Assistant.