LVDS dual-mode Configuration!

hhami · January 2, 2023, 11:50am

Hello
I want to build a yocto distro for tdx-reference-multimedia-wayland - apalis imx8-qm and ixora1.2 carrier!!

I want to connect output to 2 panels LVDS at the same time as dual-mode config.

2 x panels have physical resolution 1280x800@60 and connected to iMX8QM-ixora1.2 carrier board via LVDS lines(X13 connector-LVDS ldb2 PortA and PortB) with dual mode as represented.

I use the attached DTS file imx8qm and one of clocks works fine But there are no outputs on another LVDS panel.(there is no clock portB)
imx8-apalis-v1.1.dtsi

panel_lvds: panel-lvds {
	compatible = "panel-lvds";
	backlight = <&backlight>;

	status = "disabled";

	port {
		panel_lvds_in: endpoint {
			remote-endpoint = <&lvds1_out>;
		};
	};
};

panel2_lvds: panel2-lvds {
	compatible = "panel-lvds";
	backlight = <&backlight>;

	status = "disabled";

	port {
		panel2_lvds_in: endpoint {
			remote-endpoint = <&lvds2_out>;
		};
	};
};
	
	
&ldb2_phy {
	status = "disabled";
};

&ldb2 {
	status = "disabled";
	dual-mode;

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";
        reg = <0>;
            
		port@1 {
			reg = <1>;

			lvds1_out: endpoint {
				remote-endpoint = <&panel_lvds_in>;
			};
		};
	};
	
	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";
		reg = <1>;
		
		port@1 {
			reg = <1>;

			lvds2_out: endpoint {
				remote-endpoint = <&panel2_lvds_in>;
			};
		};
	};
	
};

display-lt170410_overlay.dts

// LT170410 LVDS display (10 inch) with a resolution of 1280x800 pixel. This display can be ordered at Toradex.

/dts-v1/;
/plugin/;

/ {
	compatible = "toradex,apalis_imx6q",
		     "toradex,apalis-imx8",
		     "toradex,apalis-imx8x",
		     "toradex,verdin-imx8mp";
};

&{/panel-lvds} {
	status = "okay";

	data-mapping = "vesa-24";
	width-mm = <217>;
	height-mm = <136>;

	panel-timing {
		clock-frequency = <68930000>;
		hactive = <1280>;
		vactive = <800>;
		hback-porch = <64>;
		hfront-porch = <64>;
		vback-porch = <5>;
		vfront-porch = <5>;
		hsync-len = <40>;
		vsync-len = <6>;
		hsync-active = <0>;
		vsync-active = <0>;
		pixelclk-active = <0>;
	};
};

&{/panel2-lvds} {
	status = "okay";

	data-mapping = "vesa-24";
	width-mm = <217>;
	height-mm = <136>;

	panel-timing {
		clock-frequency = <68930000>;
		hactive = <1280>;
		vactive = <800>;
		hback-porch = <64>;
		hfront-porch = <64>;
		vback-porch = <5>;
		vfront-porch = <5>;
		hsync-len = <40>;
		vsync-len = <6>;
		hsync-active = <0>;
		vsync-active = <0>;
		pixelclk-active = <0>;
	};
};

How can I output from all of the panels (2 x LVDS 1280x800@60) at the same time. What should be the root of that problem ?

Best Regards,

henrique.tx · January 2, 2023, 1:56pm

Hi @hhami !

I will need to investigate how to bring up your use case.

In the meantime, could you please share details about how you are physically connecting the displays to the Apalis Evaluation board?

Please, also share more information about your setup:

Which exactly Apalis iMX8QM are you using? Please share its full name and version.
Although you wrote that you are using Ixora V1.2, your screenshot is from Apalis Evaluation board. Could you please confirm which carrier board are you using? Also, share its full version.
Which BSP version are you using? You can share the output of cat /etc/os-release from the module.

Best regards,

hhami · January 2, 2023, 2:22pm

Thank you for answering @henrique.tx
I want to connect it to fpga and wish to output double LVDS at the same time as dual-mode.
1-Which exactly Apalis iMX8QM are you using? Please share its full name and version.
im using Apalis IMX8QM 4GB WB V1.0B

2- * Although you wrote that you are using Ixora V1.2, your screenshot is from Apalis Evaluation board. Could you please confirm which carrier board are you using? Also, share its full version.
yes,your right ,i made a mistake,I have ixora v1.2 and i have to upload photo of ixora datasheet connector LVDS Connector (X19)Connector type: Hirose DF13A-40DP-1.25V(55)
any way ,i dont have clock with DTS that attached ,when tested it with the oscilloscope ,there is no clock on pin 4 and 6 but i have clock on pin 25 and 27.

3- Which BSP version are you using? You can share the output of cat /etc/os-release from the module.

# cat /etc/os-release
ID=tdx-xwayland
NAME="TDX Wayland with XWayland"
VERSION="5.7.0-devel-20220905134958+build.0 (dunfell)"
VERSION_ID=5.7.0-devel-20220905134958-build.0
PRETTY_NAME="TDX Wayland with XWayland 5.7.0-devel-20220905134958+build.0 (dunfell)"
DISTRO_CODENAME="dunfell"

henrique.tx · January 2, 2023, 3:55pm

Hi @hhami !

Thanks for the answers.

Could you please share details about how you are physically connecting the displays to your Ixora Carrier Board?

If you remove the dual-mode from the &ldb2 node, does it improve the outcome?

Best regards,

hhami · January 4, 2023, 7:50am

Hello @henrique.tx
Thank you !!
1-Could you please share details about how you are physically connecting the displays to your Ixora Carrier Board?
We dont connect them physically to the displays ,now!!
I test it using the oscilloscope and see the signal of it on the related pins!!

2- If you remove the dual-mode from the &ldb2 node, does it improve the outcome?
I have removed dual-modebut right now,i can see the signal on another pins(later I can see the signal on pins 25,27 but now i can see it on the pins 4,6 !!
In fact,just moved them toghether!!

&ldb2 {
	status = "disabled";
// 	dual-mode;

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";//okay
        reg = <0>;
            
		port@1 {
			reg = <1>;

			lvds1_out: endpoint {
				remote-endpoint = <&panel_lvds_in>;
			};
		};
	};
	
	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";
		reg = <1>;
		
		port@1 {
			reg = <1>;

			lvds2_out: endpoint {
				remote-endpoint = <&panel2_lvds_in>;
			};
		};
	};
	
};

You dont know ,how can i have the signal on the dual channel A and B (pin 4,6 and pins 25,27) together even single-mode no dual-mode??

hhami · January 4, 2023, 8:33am

@henrique.tx
It seems,Not implemented dual-mode ldn driver for IMX.8!!Right??
I couldn’t find any related source for dual-mode ldb driver!!

/tdx-apalis-kernel-source/drivers/gpu/drm/imx/imx8qm-ldb.c

static int
imx8qm_ldb_bind(struct device *dev, struct device *master, void *data)
{
	struct drm_device *drm = data;
	struct device_node *np = dev->of_node;
	struct device_node *child;
	struct imx8qm_ldb *imx8qm_ldb = dev_get_drvdata(dev);
	struct ldb *ldb;
	struct ldb_channel *ldb_ch;
	struct drm_encoder *encoder[LDB_CH_NUM];
	int ret;
	int i;

	ldb = &imx8qm_ldb->base;
	ldb->dev = dev;
	ldb->ctrl_reg = 0xe0;
	ldb->output_port = 1;

	for (i = 0; i < LDB_CH_NUM; i++) {
		imx8qm_ldb->channel[i].imx8qm_ldb = imx8qm_ldb;
		ldb->channel[i] = &imx8qm_ldb->channel[i].base;
	}

	ret = imx_scu_get_handle(&imx8qm_ldb->handle);
	if (ret) {
		dev_err(dev, "failed to get scu ipc handle %d\n", ret);
		return ret;
	}

	imx8qm_ldb->id = of_alias_get_id(np, "ldb");

	imx8qm_ldb->clk_pixel = devm_clk_get(dev, "pixel");
	if (IS_ERR(imx8qm_ldb->clk_pixel))
		return PTR_ERR(imx8qm_ldb->clk_pixel);

	imx8qm_ldb->clk_bypass = devm_clk_get(dev, "bypass");
	if (IS_ERR(imx8qm_ldb->clk_bypass))
		return PTR_ERR(imx8qm_ldb->clk_bypass);

	for (i = 0; i < LDB_CH_NUM; i++) {
		encoder[i] = &imx8qm_ldb->channel[i].encoder;

		drm_encoder_helper_add(encoder[i],
				      &imx8qm_ldb_encoder_helper_funcs);
		drm_encoder_init(drm, encoder[i], &imx8qm_ldb_encoder_funcs,
				 DRM_MODE_ENCODER_LVDS, NULL);
	}

	pm_runtime_enable(dev);

	ret = ldb_bind(ldb, encoder);
	if (ret)
		goto disable_pm_runtime;

	for_each_child_of_node(np, child) {
		struct imx8qm_ldb_channel *imx8qm_ldb_ch;
		bool auxiliary_ch = false;

		ret = of_property_read_u32(child, "reg", &i);
		if (ret || i < 0 || i > 1) {
			ret = -EINVAL;
			goto free_child;
		}

		if (ldb->dual && i > 0) {
			auxiliary_ch = true;
			imx8qm_ldb_ch = &imx8qm_ldb->channel[i];
			goto get_phy;
		}

		if (!of_device_is_available(child))
			continue;

		imx8qm_ldb_ch = &imx8qm_ldb->channel[i];
get_phy:
		imx8qm_ldb_ch->phy = devm_of_phy_get(dev, child, "ldb_phy");
		if (IS_ERR(imx8qm_ldb_ch->phy)) {
			ret = PTR_ERR(imx8qm_ldb_ch->phy);
			if (ret != -EPROBE_DEFER)
				dev_err(dev, "can't get channel%d phy: %d\n",
					i, ret);
			goto free_child;
		}

		ret = phy_init(imx8qm_ldb_ch->phy);
		if (ret < 0) {
			dev_err(dev, "failed to initialize channel%d phy: %d\n",
				i, ret);
			goto free_child;
		}

		if (auxiliary_ch)
			continue;
	}

	for (i = 0; i < LDB_CH_NUM; i++) {
		ldb_ch = &imx8qm_ldb->channel[i].base;
		if (!ldb_ch->is_valid) {
			drm_encoder_cleanup(encoder[i]);
			continue;
		}

		ret = imx_drm_encoder_parse_of(drm, encoder[i], ldb_ch->child);
		if (ret)
			goto disable_pm_runtime;
	}

	return 0;

free_child:
	of_node_put(child);
disable_pm_runtime:
	pm_runtime_disable(dev);

	return ret;
}

henrique.tx · January 4, 2023, 1:26pm

Hi @hhami !

From ldb.txt « imx « display « bindings « devicetree « Documentation - linux-toradex.git - Linux kernel for Apalis, Colibri and Verdin modules, we see that we have the fsl,dual-channel configuration:

 - fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should
   be configured - one input will be distributed on both outputs in dual
   channel mode

But I am not sure it fits your needs.

I just found this from NXP for i.MX8QM: IMX8QM: LVDS mirror dual mode reference patch - NXP Community

According to the images there, you what the “Mirror dual mode”, right?

Could you please try to apply the patch attached to the link above? From what I understood, it will give you the “Mirror dual mode” and also some device tree example.

Best regards,

hhami · January 8, 2023, 12:48pm

Hello @henrique.tx
Thank you for Answering!!
I’m trying to configure the LVDS out on the imx8qm but facing some issues!!
I can’t configure the LVDS as two single-channel ,evenl!!
Do you know LVDS1 can be used as two single-channel??
Thank you in advance for your help
Best Regards,

rudhi.tx · January 10, 2023, 2:45pm

Hello @hhami,

If you take a look at the datasheet of apalis iMX8: https://docs.toradex.com/105526-apalis-imx8-datasheet.pdf, page 37 you can see that it is possible to use LVDS1_CH0 and LVDS1_CH1 as two single channel displays (see the image below).

Please let us know if that helps.

hhami · January 11, 2023, 8:26am

Hello @rudhi.tx
Thank you for answering too,
Its a little complex, i got more confused, please help,i cant understand how is it possible!!
I ask this question from NXP Employee
IMX.8qm LVDS as tow single channle Configuration
They said,we dont support that!!
Why,Can you help me??
THank you!!

matthias.tx · January 11, 2023, 5:42pm

Hello hhami,

we have supported customers with 3 LVDS single-lane Displays in the past.
the only thing we need to verify is whether the max resolution for a single lane is enough for you.

Best regards,
Matthias

Best Regards,

Matthias

hhami · January 14, 2023, 5:52am

Hello @matthias.tx
Thank you for your answer!!
Please,have a look at The LVDS Block Diagram of NXP Imx.8 :
https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/IMX8QM-LVDS-mirror-dual-mode-reference-patch/ta-p/1121478
Single Mode

Single mode (LVDS panel connects to one channel) panel 1 and panel 2 can be different panels.
It seems ,There are 2 video stream to lvds out,only and we cant use 3 lvds single-lane Display!!
Can you explain more about that,how to running 3 singel lane LVDS at the same time??
Is there any sample DeviceTree or Link about that!!
Thank you for your help!!
Best regards,

matthias.tx · January 17, 2023, 2:00pm

hello hhami,

the first two displays run on LDB1PHY one display on each lane.

Screenshot from 2023-01-17 14-55-30

Best Regards,

Matthias Gohlke

hhami · January 18, 2023, 9:40am

Hello @matthias.tx
Thank you for answering!!
Can you help me,how to edit my DTS config??
I want to run tow display on LDBPHY1 and one display on each lane!!

&ldb2 {
	status = "okay";
	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";

		port@1 {
			reg = <1>;

			lvds1_out: endpoint {
				remote-endpoint = <&panel_lvds_in>;
			};
		};
	};
	
	lvds-channel@1 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";

		
		port@1 {
			reg = <1>;

			lvds2_out: endpoint {
				remote-endpoint = <&panel2_lvds_in>;
			};
		};
	};

};

Best Regard

henrique.tx · February 8, 2023, 1:10pm

Hi @hhami !

Sorry for the delay.

Your account manager got in touch with you via email. Please kindly continue the conversation with him.

Best regards,