Hello,
We have a custom board based on the iMX8MP and that uses a native LVDS touchscreen. It runs Torizon OS with a GUI. Some EMC testing was done and apparently the LVDS is responsible for a large part of the noise.
Is there anything we can do with the device tree to reduce the noise ?
- Custom board dtsi (used with imx8mp-verdin.dtsi and imx8mp-verdin-wifi.dtsi):
&backlight {
power-supply = <®_3p3v>;
};
/* EEPROM on Mallow */
&eeprom_carrier_board {
status = "okay";
};
/* Verdin ETH_1 */
&eqos {
status = "okay";
};
/* Verdin I2C_2_DSI */
&i2c2 {
status = "okay";
};
/* Verdin I2C_4_CSI */
&i2c3 {
status = "okay";
};
/* Verdin I2C_1 */
&i2c4 {
status = "okay";
/* Audio Codec */
nau8822_1a: audio-codec@1a {
compatible = "nuvoton,nau8822";
reg = <0x1a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
#sound-dai-cells = <0>;
};
};
/* Verdin PCIE_1 */
&pcie {
status = "okay";
};
&pcie_phy {
status = "okay";
};
/* Verdin PWM_1 */
&pwm1 {
status = "okay";
};
/* Verdin PWM_2 */
&pwm2 {
status = "okay";
};
/* Verdin PWM_3_DSI */
&pwm3 {
status = "okay";
};
/* Verdin I2S_1 */
&sai1 {
assigned-clocks = <&clk IMX8MP_CLK_SAI1>;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
fsl,sai-mclk-direction-output;
status = "okay";
};
/* Verdin UART_1 */
&uart1 {
status = "okay";
};
/* Verdin UART_2 */
&uart2 {
status = "okay";
};
/* Verdin UART_3 */
&uart3 {
status = "okay";
};
/* Verdin USB_1 */
&usb3_0 {
status = "okay";
};
&usb3_phy0 {
status = "okay";
};
/* Verdin USB_2 */
&usb3_1 {
status = "okay";
};
&usb3_phy1 {
status = "okay";
};
- Panel display overlay:
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pwm/pwm.h>
#include <imx8mp-pinfunc.h>
/ {
compatible = "toradex,verdin-imx8mp";
};
&{/} {
backlight_lvds_native: backlight-lvds-native {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
brightness-levels = <0 45 63 88 119 158 203 255>;
default-brightness-level = <4>;
/* Verdin I2S_2_D_OUT as GPIO (SODIMM 46) */
enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
/* Verdin PWM_2 (SODIMM 16) */
pwms = <&pwm2 0 6666667 PWM_POLARITY_INVERTED>;
};
panel-lvds-native {
compatible = "panel-lvds";
backlight = <&backlight_lvds_native>;
data-mapping = "vesa-24";
height-mm = <86>;
width-mm = <154>;
/* Verdin I2S_2_BCLK as GPIO (SODIMM 42) */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s_2_bclk_touch_reset>;
reset-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
panel-timing {
clock-frequency = <44900000 51200000 63000000>;
de-active = <1>;
hactive = <1024>;
hback-porch = <160>;
hfront-porch = <16 160 216>;
hsync-active = <0>;
hsync-len = <1 70 140>;
pixelclk-active = <1>; /* positive edge */
vactive = <600>;
vback-porch = <23>;
vfront-porch = <1 12 127>;
vsync-active = <0>;
vsync-len = <1 10 20>;
};
port {
panel_lvds_native_in: endpoint {
remote-endpoint = <&lvds_out>;
};
};
};
};
&gpu_2d {
status = "okay";
};
&gpu_3d {
status = "okay";
};
// On Mallow, I2C_2_DSI (&i2c2) is used, On Custom I2C_1 (&i2c4)
&i2c4 {
// Pin 44 (SAI3_TXFS, GPIO4_IO31) > INT_TOUCH#
// Pin 48 (SAI3_RXD, GPIO4_IO30) > RST_TOUCH#
touchscreen@41 {
compatible = "ilitek,ili251x";
reg = <0x41>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s_2_d_in_gpio>,
<&pinctrl_i2s_2_sync_gpio>;
/* Verdin I2S_2_SYNC as GPIO (SODIMM 44) */
interrupt-parent = <&gpio4>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
/* Verdin I2S_2_D_IN as GPIO (SODIMM 48) */
reset-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
&lcdif2 {
status = "okay";
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "vesa-24";
fsl,data-width = <24>;
status = "okay";
port@1 {
reg = <1>;
lvds_out: endpoint {
remote-endpoint = <&panel_lvds_native_in>;
};
};
};
};
&ldb_phy {
status = "okay";
};
&mix_gpu_ml {
status = "okay";
};
&ml_vipsi {
status = "okay";
};
/* Verdin PWM_2 */
&pwm2 {
status = "okay";
};
&iomuxc {
pinctrl_i2s_2_d_in_gpio: gpio4io30grp {
fsl,pins =
<MX8MP_IOMUXC_SAI3_RXD__GPIO4_IO30 0x1c4>; /* SODIMM 48 */
};
pinctrl_i2s_2_sync_gpio: gpio4io31grp {
fsl,pins =
<MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x184>; /* SODIMM 44 */
};
};
- LVDS-relevant DTS configuration found in imx8mp-related device trees:
lvds_ti_sn65dsi84: bridge@2c {
compatible = "ti,sn65dsi84";
/* Verdin GPIO_9_DSI (SN65DSI84 IRQ, SODIMM 17, unused) */
/* Verdin GPIO_10_DSI (SODIMM 21) */
enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_10_dsi>;
reg = <0x2c>;
status = "disabled";
};
ldb: ldb-display-controller {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mp-ldb";
clocks = <&clk IMX8MP_CLK_MEDIA_LDB_ROOT>;
clock-names = "ldb";
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
gpr = <&media_blk_ctrl>;
power-domains = <&pgc_mediamix>;
status = "disabled";
lvds-channel@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
phys = <&ldb_phy1>;
phy-names = "ldb_phy";
status = "disabled";
port@0 {
reg = <0>;
ldb_ch0: endpoint {
remote-endpoint = <&lcdif2_disp_ldb_ch0>;
};
};
};
lvds-channel@1 {
reg = <1>;
phys = <&ldb_phy2>;
phy-names = "ldb_phy";
status = "disabled";
port {
ldb_ch1: endpoint {
remote-endpoint = <&lcdif2_disp_ldb_ch1>;
};
};
};
};
ldb_phy: phy-lvds {
compatible = "fsl,imx8mp-lvds-phy";
#address-cells = <1>;
#size-cells = <0>;
gpr = <&media_blk_ctrl>;
clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
clock-names = "apb";
power-domains = <&pgc_mediamix>;
status = "disabled";
ldb_phy1: port@0 {
reg = <0>;
#phy-cells = <0>;
};
ldb_phy2: port@1 {
reg = <1>;
#phy-cells = <0>;
};
};
Thank you for your support.
Best regards,
