Loading M4 afx from /boot

Technical Support
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8

So, loading the 2 binaries independently doesn’t quite work :frowning:

I’ve split the binaries using objcopy :-

´´´
arm-none-eabi-objcopy -j .ncache -O binary “test” “test_data2.bin”;
arm-none-eabi-objcopy -R .ncache -O binary “test” “test_app.bin”;
´´´

(n.b. I also trest with --strip-debug but the outputs are the same as might be expected)

I can run the app from MCUXpresso, of course.

Then, if I reset the board (without a power cycle) and interrupt U-Boot, I can

fatload mmc 0:1 ${loadaddr} test_app.bin
bootaux ${loadaddr}

and the app still runs.
On the other hand the app does not run if I do the above after power cycle. This is expected - with a reset, the data is left in memory, whereas after a power cycle the memory is cleared, so the app finds nothing there.
This proves that the data2(.ncache) section has been removed from the test_app.bin.

Unfortunately I have not been able to load the test_data2.bin.
After a power cycle

fatload mmc 0:1 ${loadaddr} test_app.bin
fatload mmc 0:1 0x88000000 test_data2.bin
bootaux ${loadaddr}

the app doesn’t run. There are no obvious errors on the U-Boot console.

I use the address 88000000 because that’s the address of the memory region for m_data2 as specified in the linker script

MEMORY
{
  m_interrupts          (RX)  : ORIGIN = 0x1FFE0000, LENGTH = 0x00000A00
  m_text                (RX)  : ORIGIN = 0x1FFE0A00, LENGTH = 0x0001F600
  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00020000
  m_data2               (RW)  : ORIGIN = 0x88000000, LENGTH = 0x08000000
}
:
:
  .ncache :
  {
    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
    *(NonCacheable)
    . = ALIGN(4);
    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
  } > m_data2

which, if I understand correctly, corresponds to DDR.

Also, my understanding is that there is some memory address difference between the U-Boot environment and the M4, in that the TCM addresses start from 1ffe0000 as seen from the M4, but this corresponds to 34fe0000 from U-Boot (“AP view”). As shown by bootaux.

However I haven’t found any address distinction for the DDR.

Is it correct that both M4 and U-Boot use the same addresses for the DDR ?

I did try fatload mmc 0:1 48000000 test_data2.bin after reading my way through this but that gave me ** Reading file would overwrite reserved memory **.

So now I’m a bit stuck.