Note that the i.MX 6 by default cannot read back the value of a gpio which is configured as output. You could enable this feature by setting the SION bit in the MUX config in the device tree. However it is probably easier to keep track of the last state written in your software.
Sorry, but I’m not able to find the relation between GPIO3/5 pin X27.15 and the Linux GPIO 38: if I follow the link that you provide (GPIO Alphanumeric to GPIO Numeric Assignment | Toradex Developer Center), I can see 32 gpios in the GPIO3 controller where the linux pin numbers start at 64 and end at 95. No relation with 38 a priori.
Where can I find more information about that? In my case, I’m working with a Ixora v1.1A board.
Thank you and regards
Vicente A.
Ixora X27.15 is MXM3_5 as seen from the Ixora schematic (Page 19) where MXM3_5 is GPIO2_IO06 as per the Apalis iMX6 Datasheet (Page 21). GPIO2_IO06 as per this GPIO Alphanumeric to GPIO Numeric Assignment article would then be GPIO38 in Linux speak.
There is a formula to calculate the linux pin number: 32 x (controller- 1) + gpio
Therefore for pin 15 which is GPIO2_IO06 that would be: 32 x (2-1) + 6 = 38
However, finding the information is not easy: in the apalis imx6 datasheet (https://docs.toradex.com/101770-apalis-imx6-datasheet.pdf) the information about GPIO2_IO06 in page 19 talks about NAND_DATA06 signal attached to x1 pin 5, that is neither related with MXM3_5 nor GIPIO03. Nevertheless in page 13 you can find relation between NAND_DATA06, x1 pin 5 and, finally, GPIO03 apalis signal. A little bit messy to found it
Anyway, thanks a lot for your help and your quick and useful answer.
More than the iMX6 ball name NAND_DATA05 is an alternate pinmultiplex for the pin under consideration. The MXM pin under consideration can either be GPIO or could have been NAND if it was used as such.