I cannot get jtag to work with module verdin-am62 and the Yavia carrier board.
The jtag probe I use is the XDS110 together with CSS studio software from TI.
When trying to connect I always get the message:
This error is generated by TI's USCIF driver or utilities.
The value is '-233' (0xffffff17).
The title is 'SC_ERR_PATH_BROKEN'.
The explanation is:
The JTAG IR and DR scan-paths cannot circulate bits, they may be broken.
An attempt to scan the JTAG scan-path has failed.
The target's JTAG scan-path appears to be broken
with a stuck-at-ones or stuck-at-zero fault.
The TDO pin stays always high.
Further when replacing the verdin-am62 module with a verdin-imx8mp module, it is working.
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Hi Kristof,
Based on the information provided, it seems like the issue is specific to the Verdin AM62 module when used with the Yavia carrier board. Here are some steps you can take to troubleshoot and potentially resolve the issue:
Check Connections: Double-check all physical connections between the Verdin AM62 module and the Yavia carrier board to ensure they are secure and correctly configured. Loose or incorrect connections could lead to the JTAG scan-path issues you’re experiencing.
Inspect the Module: Examine the Verdin AM62 module for any visible signs of damage or misconfiguration that might affect the JTAG functionality. Look for any bent pins, soldering issues, or other physical defects.
Configuration Settings: Review the configuration settings in the CSS studio software to ensure they are appropriate for the Verdin AM62 module. There might be specific settings required for this module that differ from the Verdin IMX8MP.
Further Testing: If possible, try using a different JTAG probe or setup to see if the issue persists. This can help determine if the problem is with the probe or the module itself.
Manufacturer Support: If the problem continues, consider reaching out to Toradex support for assistance. There might be known issues or updates related to the Verdin AM62 module that could address this problem.
These steps should help you narrow down the cause of the JTAG connectivity issue. If you need further assistance, don’t hesitate to contact Toradex support.
Best regards,
[Your Name]
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We would like to use JTAG for development and debugging of an application running on the M4F mcu. I verified the connections, they seem to be ok. At start TDI and TDO are pulled high, I can see a clock generated by XDS110 and TDI is pulled low, but TDO stays high all the time.
Unfortunately there is a known issue with the JTAG interface of Verdin AM62 V1.1 modules.
I think you may be affected by this, please see the following description:
The JTAG interface on the Verdin AM62 modules is not compatible with JTAG debuggers featuring an open drain TRSTn output.
This is due to the power-up and normal operation requirements for the AM62 SoC’s JTAG interface.
Power-up: According to Texas Instruments requirements, the TRSTn pin of the SoC should be held low during the SoC’s power-up for proper JTAG interface initialization. For this reason, the TRSTn pin of the SoC is pulled down to GND on the Verdin AM62 SoM with a 4.7 kOhm resistor.
Normal operation: Texas Instruments recommends holding the TRSTn input low also during normal operation to prevent any noise on the other JTAG signals from accidentally causing the debug subsystem to alter code execution. To activate the JTAG interface, the AM62 SoC’s TRSTn input (JTAG_1_TRST# input of the SoM) should be pulled up after the SoM’s power-up.
If the debugger has the TRSTn output configured as an Open Drain, it cannot set the SoM’s JTAG_1_TRST# input high and activate the JTAG interface.
