Is it possible to set the MOSI pin on the SPI low after a transaction?


Basically what the title states. After we transmit a message over the SPI, is it possible to set the MOSI pin to low?

Hello @edmirsuljicOIM ,
Can you please explain us your use case? Why do you need this specific SPI behavior?
Are you talking about the QSPI or the ECSPI?
Are you planning to use SPI as a single-wire interface?

Best regards,

We are using the SPI to transmit data to a IR-transmitter. After the data has been sent, the pin is kept high, making the IR-LED constantly shine which in turn makes our IR receiver not work properly.
So after the data has been sent, we want to set the MOSI pin (as it controls the IR) to low again.

It is the ECSPI and yes it is a single-wire interface.

Hello @edmirsuljicOIM ,
In that case , have you considered this approach?

  • Invert the data before sending it to the SPI

  • Inverting the MOSI signal again externally

That would leave you with the same data and MOSI idle low.

Best regards,

You could develop your protocol to keep last bit always clear/set.

You may define two SPI devices in device tree, one real your device with real CS pin, and one dummy. Once you write to your real device, write to dummy device with last bit “0” or “1” as required.

There are digital isolator IC’s, which don’t mind constant “1” or “0”.