Imx8mplus Tolerance for Diff Signals on LVDS interface

Hi Kevin
This already helps to solve part of the problem. In the document is written, that the tolerance for maximum Bitrate is 150um ==1ps.
When we calculate the sampling requirements (1/(80MHz2(clock cycles) 7(bits per clock)*10(sample safety margin)) we land at 89ps. Can you help me why the tolerance is as low as 1ps?
We are using Verdim iMX8M Plus Modules.