I am trying to use the I2S interface (SAI1) on the IMX8M Plus on the Mallow board. I connected the wires to the following I2S_1 pin on the extension headers to the audio board. What I can see is the the BCLK and SYNC clock are not uniform.
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Hi Tom,
From the information provided, it seems like you are experiencing issues with the I2S interface (SAI1) on the IMX8M Plus when using the Mallow Carrier Board. The non-uniform BCLK and SYNC signals, along with random activity on the lines, could indeed be indicative of a pin-muxing conflict or misconfiguration.
Here are a few suggestions to troubleshoot and potentially resolve the issue:
Pin Configuration: Double-check the pin configuration in your device tree. Ensure that the pins you are using for BCLK, SYNC, and DOUT are correctly configured and do not conflict with other peripherals. The pinctrl settings should match the physical connections on the Mallow board.
Clock Configuration: Verify the clock settings in your DTS configuration. Ensure that the assigned clocks and clock rates are correct for your application. The assigned-clock-rates value should match the expected frequency for your I2S interface.
Check for Conflicts: Look for any other device tree nodes that might be using the same pins or clocks. Conflicts can arise if multiple peripherals are trying to use the same resources.
Driver Support: Ensure that the SAI1 driver is properly enabled and configured in your kernel. Check the kernel documentation for any specific requirements or configurations needed for the SAI1 interface.
Debugging: Use tools like devmem2 or memtool to inspect the register values for the IOMUX and clock settings. This can help identify if the hardware is configured as expected.
Consult Documentation: Refer to the Verdin iMX8M Plus and Mallow Carrier Board documentation for any specific notes or errata related to the I2S interface.
If the issue persists, consider reaching out to Toradex technical support for further assistance. They may have additional insights or updates that could help resolve the problem.
Regards,
[Your Name]
Please, also check if these links can help you solve your problem:
The clock rate you’ve assigned (196+ MHz) is unusually high and may be causing sampling artifacts in your logic analyzer. Typically, clock rates for the SAI interface are set to 24,576,000 Hz or 49,152,000 Hz.
Also, keep in mind that the Verdin development board is equipped with an NAU88C22YG codec, and the Dahlia carrier board uses a WM8904CGEFL codec. You can refer to the device trees for these boards as examples.