IMX8MM Suspend-to-RAM State


Using Linux Yocto custom build based to Toradex Yocto reference project (BSP 5.2.0) and custom carrier board. I’m using suspend to RAM state and SOM pin 256 CTRL_SLEEP_MOCI# to enter into low power state. SOM switches into sleep state and display is switched off:

[ 43.508340] PM: suspend entry (deep)
[ 43.517982] Filesystems sync: 0.006 seconds
[ 43.523279] Freezing user space processes … (elapsed 0.001 seconds) done.
[ 43.531796] OOM killer disabled.
[ 43.535021] Freezing remaining freezable tasks … (elapsed 0.104 seconds) done.
[ 43.647045] printk: Suspending console(s) (use no_console_suspend to debug)

Anyhow the pin 256 CTRL_SLEEP_MOCI# remains in 1.8 V, I expect it should go down.

What could be reason for this and how to configure device to follow datasheet ?


“Enable signal for the power rails on the carrier board
peripherals which need to be turned off during sleep mode. It is
only high during running mode. The signal is an open-drain type
with on-module 10k pull-up resistors. The signal is defined
during the power up sequence. Can be left floating on carrier

Hi @veskola

This feature is not implemented in the BSP.

Currently in the device tree the pin is muxed to GPIO and set to output high here:


Thanks Max,

Hmm, datasheet tell this should be functional, actually I assumed it will happen in HW level.

When ever I2C chips, touch and MIPI/LVDS bride chips, are powered during wakeup kernel should do re-initialization to get display out. Sounds complicate. This is showstopper for our project.

Is there any plan to implement this in BSP or provide instructions how this can be done with Yocto Linux project ?


Hi @veskola ,

Yes, there are plans to implement this into the BSP. At the current moment, it is not ready to publish yet. Toradex is still working on properly implementing it.

It is important to keep in mind that the Verdin products are still in the Sample Product state and therefore it is expected that not every feature is implemented yet.

Toradex will publish anything new, as soon as it’s available.

Unfortunately, there is no better answer at the moment.

Best Regards

Hello Kevin,

Thanks for the reply, good to hear the final solution is coming. Mean while I discovered a workaround which was quite simple to implement into our HW/SW, but I will change it to follow solution provided by Toradex BSP later. Trick was:

  • In device tree SODIMM256 was defined to be enable pin for sn65dsi84 driver
  • Patching of sn65dsi83_brg.c driver change enable pin usage, into power on method added extra 11 ms delay to give bridge chip time to power up, power off method enable pin down removed because power off was called while during touch chip initialization, stop stream method enable pin down added instead.

Now when ever SOM is put to sleep enable pin, which is now SODIMM256, goes down and 1.8V LVDS power rail goes down in our custom carrier board. LVDS panel, bridge and touch chips are powered down, and now LVDS panel will not be damaged.

It’s very important LVDS panel don’t have power if there is no LVDS signal which was the case when bridge enable pin was down. That’s what happened with original Yocto reference project with BSP 5.2.0.

Br Vesa

Hi @veskola ,

Thank you for your message as well as for posting the workaround.

I close this one for now.

Best Regards