Hi everyone!

I`m developing PCIe driver for QNX and strugglilng a problem with having access to PCIE controller regisers (i think that some of clock lanes not enabled).

Linux log prints me: [ 1.273916] imx6q-pcie 33800000.pcie: PCIe PLL locked after 0 us.
So, my QNX driver founded on prints me β†’ PCIe PLL lock timeout.

The simple write to IMX8MM_CLK_PCIE1_ROOT (CCGR37) register doesn`t make any difference.

Is there any special initialization sequence for CCM or for PCIe Controller?


All details about clock management are described in Chapter 5.1, β€œClock Control Module (CCM),” in the i.MX 8M Mini Applications Processor Reference Manual. Since clock management isn’t a feature of the Toradex SOM but a property of the iMX8MM SOC, I recommend consulting the NXP community for further questions

1 Like

Thanks a lot.