What I fail to understand though, is what the “0x00000021” comes from.
I understand that this describes the options for the IO pin but I’m unable to find any information about what this value represents and how to determine my own value.
I’ve read that this should be described in the iMX8 reference manual but I’m unable to find any references to this “CONFIG” parameter of the configuration.
Can someone point me in the right direction so I can determine my own CONFIG values?
By the way, can someone explain to me why “SC_P_xxxx” definitions are used instead of “MX8MQ_IOMUXC_xxxx” definitions, like I’ve seen in other examples?
I’m not an expert, but I was wondering the same thing a few weeks ago. I couldn’t find a manual from NXP (might it still be under NDA?)
However, if you download the Pins Tool from NXP you can create a project for the SOC, select the pins in question (and their function), and then you have a panel at the bottom where you can select different options for the pins (and functions). Then, on the right side you have a panel with “Code Preview”, where you can find a DTS file. I just tried a few options until the numbers matched.
For SC_P_MLB_SIG_LSIO_GPIO3_IO26 I get the following:
0x00000020 is pull-up
0x00000001 is low drive strength
And I believe it’s the same for SC_P_FLEXCAN2_TX_LSIO_GPIO4_IO02
You need an account to download the software, but that’s free.
Linux configures pads through the device tree, the full documentation of the binding is under Documentation/devicetree/bindings/pinctrl/fsl,imx8qxp-pinctrl.txt. but here is an extract:
* Freescale i.MX8QXP IOMUX Controller
- compatible: "fsl,imx8qxp-iomuxc"
- fsl,pins: each entry consists of 2 integers. Its format is
- i.MX8QXP have different pad types, please refer to below pad
register definitions, the pinctrl driver will just write the
pin_config into the hardware register.
Instead of configuring each parameter individually as done with sc_pad_set_gp_28fdsoi it configures the pad as if writing to a register, the bitfield format is under the binding documentation but it is as follows:
All the configurations mentioned above can be configured, but they are done in a single pass, e.g. Muxing, Configuration (Norma, Open Drive, etc…), Wakeup control, and GP controls are for Pull Select Drive Strenght etc… Check the Reference Manual Chapter for IOMUXD for the register definition for each pad.