iMX8 GPIO0 chip (problem in mxm_2,5,7)

Technical Support
, ,
1

Hello,

i’m trying to work with the GPIO0 chip.
most of the gpio lines seem to be working correctly using both methods of accessing gpios (Sysfs and gpiod).

The problem is only with (GPIO0_IO12 (mxm_5), GPIO0_IO13 (mxm_7)) they work only with gpiod library.
Is it not possible to access them anymore with Sysfs?

Example of accessing the GPIO with Sysfs:

    int gpio = (480-(32*0)+12);

	FILE* fd1 = fopen("/sys/class/gpio/export", "w");
	fprintf(fd1, "%d", gpio);
	fclose(fd1);

	sprintf(buf, "/sys/class/gpio/gpio%d/direction", gpio);
	FILE* fd2 = fopen(buf, "w");
	fprintf(fd2, "out");
	fclose(fd2);
        
    int fd;
	sprintf(buf, "/sys/class/gpio/gpio%d/value", gpio);
    fd = open(buf, O_WRONLY); //open for write

    write(fd,"0",1);
	write(fd,"1",1);

In addition, after disabling the PWM0,PWM1,PWM2,PWM3 in the device tree, the GPIO0_IO19 (mxm_2) is not working using both methods: (gpiod, or Sysfs). Whereas, the GPIO0_IO22 (mxm_6) works in both methods (PWMs disabled). what could be wrong with GPIO0_IO19?

Thanks in advance,

Best regards, Majd

2

Hi

The problem is only with (GPIO0_IO12 (mxm_5), GPIO0_IO13 (mxm_7)) they work only with gpiod library. Is it not possible to access them anymore with Sysfs?

For me, albeit with a non RT kernel, both pins can be used as GPIO outputs using sysfs or the gpiod device nodes.

Note that you must unexport a GPIO in sysfs if you want to use it in gpiod. (The cmdline tools I use for gpiod release the GPIO after use, that might depend on how one uses the gpiod interface.

E.g.

root@apalis-imx8:~# echo 492 > /sys/class/gpio/export
root@apalis-imx8:~# echo 493 > /sys/class/gpio/export
root@apalis-imx8:~# echo out > /sys/class/gpio/gpio492/direction
root@apalis-imx8:~# echo out > /sys/class/gpio/gpio493/direction

root@apalis-imx8:~# echo 1 > /sys/class/gpio/gpio492/value
root@apalis-imx8:~# echo 1 > /sys/class/gpio/gpio493/value

root@apalis-imx8:~# echo 492 > /sys/class/gpio/unexport
root@apalis-imx8:~# echo 493 > /sys/class/gpio/unexport

And gpiod:

root@apalis-imx8:~# gpioset 0 12=1
root@apalis-imx8:~# gpioset 0 12=0

the GPIO0_IO19 (mxm_2) is not working using both methods: (gpiod, or Sysfs). Whereas, the GPIO0_IO22 (mxm_6) works in both methods

After disabling the PWM and making sure that the pins are muxed to their GPIO function, for me both GPIOs work as expected. Either by using the sysfs or the gpiod interface.

Could you post your device tree changes?
Could you retest the non working GPIOs on the cmdline with the commands I posted?

Max

3

Hi @max.tx,
Thank you for your answer.

the changes i’ve done is on 3 files:
fsl-imx8qm-apalis-v1.1.dtsi
fsl-imx8qm-apalis-eval.dtsi
fsl-imx8qm-apalis-ixora-v1.1.dtsi

What i want actually is to enable the gpios1-8 which are in the pin group x27 in ixora board
in addition to GPIO0_19 and GPIO0_22.

After compiling i tried
“fsl-imx8qm-apalis-eval.dtb” then “fsl-imx8qm-apalis-ixora-v1.1.dtb” as device tree for the board

in “fsl-imx8qm-apalis-eval.dtb” gpio3 and 4 works in sysfs. in “fsl-imx8qm-apalis-ixora-v1.1.dtb” not.

Now after some changes even gpio7 and gpio8 are not working in sysfs.
could you please take a look the changes

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-eval.dtsi
index 6153e6a..e4418e9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-eval.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-eval.dtsi
@@ -364,7 +364,7 @@
 
 /* Apalis PWM3, MXM3 pin 6 */
 &pwm0 {
-	status = "okay";
+	status = "disabled";
 };
 
 /* Apalis PWM4, MXM3 pin 8 */
@@ -374,7 +374,7 @@
 
 /* Apalis PWM1, MXM3 pin 2 */
 &pwm2 {
-	status = "okay";
+	status = "disabled";
 };
 
 /* Apalis PWM2, MXM3 pin 4 */
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-ixora-v1.1.dtsi
index ae7dd42..091b17b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-ixora-v1.1.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-ixora-v1.1.dtsi
@@ -413,7 +413,7 @@
 
 /* Apalis PWM3, MXM3 pin 6 */
 &pwm0 {
-	status = "okay";
+	status = "disabled";
 };
 
 /* Apalis PWM4, MXM3 pin 8 */
@@ -423,7 +423,7 @@
 
 /* Apalis PWM1, MXM3 pin 2 */
 &pwm2 {
-	status = "okay";
+	status = "disabled";
 };
 
 /* Apalis PWM2, MXM3 pin 4 */
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi
index 6f5e5d9..5ad5f85 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-v1.1.dtsi
@@ -143,7 +143,7 @@
 		};
 	};
 
-	reg_pcie_switch: regulator-pcie-switch {
+/* 	reg_pcie_switch: regulator-pcie-switch {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_gpio7>;
@@ -153,7 +153,7 @@
 		regulator-min-microvolt = <1800000>;
 		regulator-max-microvolt = <1800000>;
 		startup-delay-us = <100000>;
-	};
+	}; */
 
 	reg_usb_host_vbus: regulator-usb-host-vbus {
 		compatible = "regulator-fixed";
@@ -173,14 +173,14 @@
 		regulator-max-microvolt = <1800000>;
 	};
 
-	gpio-fan {
+/* 	gpio-fan {
 		compatible = "gpio-fan";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_gpio8>;
 		gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
 		gpio-fan,speed-map = <	 0 0
 				      3000 1>;
-	};
+	}; */
 
 	sound {
 		compatible = "simple-audio-card";
@@ -555,19 +555,19 @@
 			>;
 		};
 
-		/* Apalis GPIO7 */
-		pinctrl_gpio7: gpio7 {
-			fsl,pins = <
-				SC_P_MLB_SIG_LSIO_GPIO3_IO26			0x00000021
-			>;
-		};
+		// /* Apalis GPIO7 */
+		// pinctrl_gpio7: gpio7 {
+			// fsl,pins = <
+				// SC_P_MLB_SIG_LSIO_GPIO3_IO26			0x00000021
+			// >;
+		// };
 
-		/* Apalis GPIO8 */
-		pinctrl_gpio8: gpio8 {
-			fsl,pins = <
-				SC_P_MLB_DATA_LSIO_GPIO3_IO28			0x00000021
-			>;
-		};
+		// /* Apalis GPIO8 */
+		// pinctrl_gpio8: gpio8 {
+			// fsl,pins = <
+				// SC_P_MLB_DATA_LSIO_GPIO3_IO28			0x00000021
+			// >;
+		// };
 
 		/* Apalis I2C1 */
 		pinctrl_lpi2c2: lpi2c2grp {
@@ -734,11 +734,11 @@
 		};
 
 		/* Apalis PWM1 */
-		pinctrl_pwm2: pwm2grp {
+/* 		pinctrl_pwm2: pwm2grp {
 			fsl,pins = <
 				SC_P_GPT1_COMPARE_LSIO_PWM2_OUT		0x00000020
 			>;
-		};
+		}; */
 
 		/* Apalis PWM2 */
 		pinctrl_pwm3: pwm3grp {
@@ -748,11 +748,11 @@
 		};
 
 		/* Apalis PWM3 */
-		pinctrl_pwm0: pwm0grp {
-			fsl,pins = <
-				SC_P_UART0_RTS_B_LSIO_PWM0_OUT		0x00000020
-			>;
-		};
+		// pinctrl_pwm0: pwm0grp {
+			// fsl,pins = <
+				// SC_P_UART0_RTS_B_LSIO_PWM0_OUT		0x00000020
+			// >;
+		// };
 
 		/* Apalis PWM4 */
 		pinctrl_pwm1: pwm1grp {
@@ -1282,7 +1282,7 @@
 };
 
 /* Apalis PCIE1 */
-&pciea{
+/* &pciea{
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_reset_moci>;
 	clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>,
@@ -1295,7 +1295,7 @@
 	fsl,max-link-speed = <1>;
 	reset-gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
 	vpcie-supply = <&reg_pcie_switch>;
-};
+}; */
 
 /* On-module Wi-Fi */
 &pcieb{
@@ -1328,11 +1328,11 @@
 };
 
 /* Apalis PWM3, MXM3 pin 6 */
-&pwm0 {
+/* &pwm0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm0>;
 	#pwm-cells = <3>;
-};
+}; */
 
 /* Apalis PWM4, MXM3 pin 8 */
 &pwm1 {
@@ -1342,11 +1342,11 @@
 };
 
 /* Apalis PWM1, MXM3 pin 2 */
-&pwm2 {
+/* &pwm2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
 	#pwm-cells = <3>;
-};
+}; */
 
 /* Apalis PWM2, MXM3 pin 4 */
 &pwm3 {
4

Hi

A pin MUST be muxed to the alternate function you want to use.

When you disable the PWM nodes you a) no longer instantiate the driver for that pin and b) you no longer mux the pin to the PWM alternate function. But you do not make sure by that that these pins get muxed to GPIO.

The same holds true with Apalis GPIO_7, GPIO 8. You comment PCIe and related nodes and the GPIO Fan node. With that among other things the pins you want to use as GPIO sno longer get muxed to their GPIO function.

Please also have a look at this article.

Max

5

Hi @max.tx,

in the iomuxc node after disabling the pwm2 I added the child node:

 		pinctrl_gpio_pwm2: gpiopwm2grp {
			fsl,pins = <
				SC_P_GPT1_COMPARE_LSIO_GPIO0_IO19		0x06000021
			>;
		};

but it is still not working with

gpioset 0 19=1

(I also tried to reference the pinctrl_gpio_pwm2 in the pinctrl-0 of iomuxc)
whereas “gpioset 0 22=1” is still working properly, even with the fact the pwm0 is disabled.

According to the iMX8 datasheet, the gpio7 and 8 are muxed as gpios by default. However leaving the pcie_reg_switch or gpio-fan not commented out, will result in that GPIO3_IO26 and 28 are busy. could you please refer to the change that should be made here?.

6

Hi

You do not only need a pinctrl node but additionally a reference for the pinctrl node must be added to an pinctrl-0 property of a node which is not disabled.

If you want to use a pin from userspace then the iomuxc is a good place for that. So you could amend to the list of pinctrl already muxed for the iomuxc driver:

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>,
		    <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>,
		    <&pinctrl_gpio34>, <&pinctrl_gpio_usbh_oc_n>,
		    <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>,
		    <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>,
		    <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>,
		    <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>,
		    <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>;

Max